AD5560JSVUZ datasheet(3/67 Pages) AD

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AD5560

Data Sheet

Rev. E | Page 2 of 66

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 3

Functional Block Diagram .............................................................. 4

Specifications..................................................................................... 5

Timing Characteristics .............................................................. 13

Timing Diagrams........................................................................ 13

Absolute Maximum Ratings.......................................................... 15

ESD Caution................................................................................ 15

Pin Configurations and Function Descriptions ......................... 16

Typical Performance Characteristics ........................................... 20

Terminology .................................................................................... 28

Theory of Operation ...................................................................... 29

Force Amplifier........................................................................... 29

DAC Reference Voltage (VREF)............................................... 29

Open-Sense Detect (OSD) Alarm and Clamp ....................... 29

Device Under Test Ground (DUTGND)................................. 29

GPO.............................................................................................. 29

Comparators................................................................................ 30

Current Clamps .......................................................................... 30

Short-Circuit Protection............................................................ 30

Guard Amplifier ......................................................................... 30

Compensation Capacitors......................................................... 30

Current Range Selection............................................................ 31

High Current Ranges ................................................................. 31

Ideal Sequence for Gang Mode................................................. 32

Compensation for Gang Mode................................................. 32

System Force/Sense Switches .................................................... 32

Die Temperature Sensor and Thermal Shutdown.................. 33

Measure Output (MEASOUT) ................................................. 33

VMID Voltage ................................................................................ 33

Force Amplifier Stability............................................................ 36

Poles and Zeros in a Typical System ........................................ 37

Minimizing the Number of External Compensation

Components................................................................................ 37

Extra Poles and Zeros in the AD5560...................................... 37

Compensation Strategies........................................................... 38

Optimizing Performance for a Known Capacitor Using

Autocompensation Mode.......................................................... 38

Adjusting the Autocompensation Mode................................. 39

Dealing with Parallel Load Capacitors .................................... 39

DAC Levels.................................................................................. 39

Force and Comparator DACs ................................................... 39

Clamp DACs ............................................................................... 39

OSD DAC .................................................................................... 40

DUTGND DAC.......................................................................... 40

Offset DAC.................................................................................. 40

Offset and Gain Registers.......................................................... 40

Reference Selection .................................................................... 41

Calibration................................................................................... 41

Additional Calibration............................................................... 41

System Level Calibration........................................................... 41

Choosing AVDD/AVSS Power Supply Rails............................... 42

Choosing HCAVSSx and HCAVDDx Supply Rails ................... 42

Power Dissipation....................................................................... 42

Package Composition and Maximum Vertical Force............ 43

Slew Rate Control....................................................................... 43

Serial Interface ................................................................................ 45

SPI Interface................................................................................ 45

SPI Write Mode .......................................................................... 45

SDO Output ................................................................................ 45

RESET Function ......................................................................... 45

BUSY Function........................................................................... 45

LOAD Function.......................................................................... 45

Control Registers............................................................................ 47

DPS and DAC Addressing ........................................................ 47

Readback Mode .......................................................................... 58

DAC Readback............................................................................ 58

Power-On Default ...................................................................... 58

Using the HCAVDDx and HCAVSSx Supplies .......................... 60

Power Supply Sequencing ......................................................... 60

Required External Components............................................... 61

Power Supply Decoupling ......................................................... 62

Applications Information .............................................................. 63

Thermal Considerations............................................................ 63

Temperature Contour Map on the Top of the Package......... 64

Outline Dimensions....................................................................... 65

Ordering Guide .......................................................................... 66

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