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AD7927 датащи(PDF) 22 Page - Analog Devices |
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AD7927 датащи(HTML) 22 Page - Analog Devices |
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22 / 29 page ![]() Data Sheet AD7927 Rev. D | Page 21 of 28 1 SCLK DOUT DIN 16 1 1 16 DUMMY CONVERSION INVALID DATA KEEP DIN LINE TIED HIGH FOR FIRST TWO DUMMY CONVERSIONS 12 12 12 DUMMY CONVERSION INVALID DATA INVALID DATA 16 CORRECT VALUE IN CONTROL REGISTER, VALID DATA FROM NEXT CONVERSION, USER CAN WRITE TO SHADOW REGISTER IN NEXT CONVERSION CONTROL REGISTER IS LOADED ON THE FIRST 12 CLOCK EDGES DATA INTO CONTROL REGISTER CS Figure 24. Three-Dummy-Conversions to Place AD7927 into the Required Operating Mode After Power Supplies Are Applied POWERING UP THE AD7927 When supplies are first applied to the AD7927, the ADC may power up in any of the operating modes of the part. To ensure that the part is placed into the required operating mode, the user should perform a dummy cycle operation as outlined in Figure 24. The three-dummy-conversion operation outlined in Figure 24 must be performed to place the part into the auto shutdown mode. The first two conversions of this dummy cycle operation are performed with the DIN line tied high, and for the third conversion of the dummy cycle operation, the user should write the desired control register configuration to the AD7927 to place the part into the auto shutdown mode. On the third CS rising edge after the supplies are applied, the control register contains the correct information and valid data results from the next conversion. Therefore, to ensure the part is placed into the correct operating mode, when supplies are first applied to the AD7927, the user must first issue two serial write operations with the DIN line tied high, and on the third conversion cycle the user can then write to the control register to place to part into any of the oper- ating modes. The user should not write to the shadow register until the fourth conversion cycle after the supplies are applied to the ADC, to guarantee the control register contains the correct data. If the user wishes to place the part into either the normal or full shutdown mode, the second dummy cycle with DIN tied high can be omitted from the three-dummy-conversion operation outlined in Figure 24. POWER VS. THROUGHPUT RATE In auto shutdown mode, the average power consumption of the ADC may be reduced at any given throughput rate. The power saving depends on the SCLK frequency used, that is, conversion time. In some cases where the conversion time is quite a proportion of the cycle time, the throughput rate needs to be reduced to take advantage of the power-down modes. Assuming a 20 MHz SCLK is used, the conversion time is 800 ns, but the cycle time is 5 μs when the sampling rate is at a maximum of 200 kSPS. If the AD7927 is placed into shutdown for the remainder of the cycle time, then on average far less power is consumed in every cycle compared to leaving the device in normal mode. Furthermore, Figure 25 shows how as the through- put rate is reduced, the part remains in its shutdown longer and the average power consumption drops accordingly over time. For example, if the AD7927 is operated in a continuous sampling mode, with a throughput rate of 200 kSPS and an SCLK of 20 MHz (AVDD = 5 V), and the device is placed in auto shutdown mode, that is, if PM1 = 0 and PM0 = 1, then the power consumption is calculated as follows. The maximum power dissipation during the conversion time is 13.5 mW (IDD = 2.7 mA maximum, AVDD = 5 V). If the power- up time from auto shutdown is 1 μs and the remaining conversion time is another cycle, that is, 800 ns, the AD7927 can be said to dissipate 13.5 mW for 1.8 μs during each conversion cycle. For the remainder of the conversion cycle, 3.2 μs, the part remains in shutdown. The AD7927 can be said to dissipate 2.5 μW for the remaining 3.2 μs of the conversion cycle. If the throughput rate is 200 kSPS, the cycle time is 5 μs and the average power dissipated during each cycle is (1.8/5) × (13.5 mW) + (3.2/5) × (2.5 μW) = 4.8616 mW. Figure 25 shows the maximum power vs. throughput rate when using the auto shutdown mode with 3 V and 5 V supplies. THROUGHPUT (kSPS) 10 0 200 0.1 0.01 80 1 100 140 180 20 40 60 120 160 AVDD = 5V AVDD = 3V Figure 25. Power vs. Throughput Rate |
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