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AD7927

Data Sheet

Rev. D | Page 16 of 28

For ac applications, removing high frequency components from

the analog input signal is recommended by use of an RC low-

pass filter on the relevant analog input pin. In applications where

harmonic distortion and signal-to-noise ratio are critical, the

analog input should be driven from a low impedance source. Large

source impedances significantly affect the ac performance of the

ADC. This may necessitate the use of an input buffer amplifier.

The choice of the op amp is a function of the particular application.

When no amplifier is used to drive the analog input, limit

the source impedance to low values. The maximum source

impedance depends on the amount of THD that can be

tolerated. The THD increases as the source impedance

increases, and performance degrades (see Figure 8).

AVDD

VIN

30pF

4pF

CONVERSION PHASE: SWITCH OPEN

TRACK PHASE: SWITCH CLOSED

Figure 16. Equivalent Analog Input Circuit

ADC TRANSFER FUNCTION

The output coding of the AD7927 is either straight binary

or twos complement, depending on the status of the LSB in

the control register. The designed code transitions occur at

successive LSB values (that is, 1 LSB, 2 LSBs, and so forth).

The LSB size is REFIN/4096 for the AD7927. The ideal transfer

characteristic for the AD7927 when straight binary coding is

selected is shown in Figure 17, and the ideal transfer characteristic

for the AD7927 when twos complement coding is selected is

shown in Figure 18.

000…000

ANALOG INPUT

111…111

000…001

000…010

111…110

•

111…000

•

011…111

•

1LSB

1LSB = VREF/4096

+VREF – 1LSB

NOTES

VREF IS EITHER REFIN OR 2 × REFIN.

Figure 17. Straight Binary Transfer Characteristic

ANALOG INPUT

100…000

011…111

100…001

100…010

011…110

•

000…001

111…111

•

000…000

1LSB = 2 × VREF/4096

+VREF – 1LSB

–VREF + 1LSB

VREF – 1LSB

Figure 18. Twos Complement Transfer Characteristic with REFIN ± REFIN

Input Range

HANDLING BIPOLAR INPUT SIGNALS

Figure 19 shows how useful the combination of the 2 × REFIN

input range and the twos complement output coding scheme

is for handling bipolar input signals. If the bipolar input signal

is biased about REFIN and twos complement output coding is

selected, then REFIN becomes the zero code point, −REFIN is

negative full scale and +REFIN becomes positive full scale, with

a dynamic range of 2 × REFIN.

AD7927

DOUT

011…111

000…000

100…000

(= 0V)

VREF

0.1µF

R1 = R2 = R3 = R4

AVDD

REFIN

VIN0

VIN7

VDRIVE

TWOS

COMPLEMENT

VDD

DSP/

MICROPROCESSOR

+REFIN

REFIN

–REFIN

(= 2 × REFIN)

Figure 19. Handling Bipolar Signals

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