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LTC4259A датащи(PDF) 17 Page - Linear Technology |
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LTC4259A датащи(HTML) 17 Page - Linear Technology |
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17 / 32 page ![]() LTC4259A 17 4259Af Dual-Level Current Limit A PD is permitted to draw up to 15.4W continuously and up to 400mA for 50ms. The LTC4259A has two correspond- ing current limit thresholds, ICUT (375mA typ) and ILIM (425mA typ). These are given by the equations: ICUT = VCUT/RS, ILIM = VLIM/RS RS is the sense resistor and should be 0.5Ω for IEEE 802.3af compliance. While the LTC4259A allows the port current to exceed ICUT for a limited time period (see tICUT timing below), it does not allow the current to exceed ILIM. The current limit circuit monitors the port current by monitoring the voltage across the sense resistor and re- duces the MOSFET gate voltage as needed to keep the current at or below ILIM. When the current drops below ILIM, the gate voltage is restored to the full value to keep the MOSFET resistance to a minimum. tICUT Timing Whenever more than ICUT = VCUT/RS flows through a port, the port’s sense voltage is above VCUT and the tICUT timer counts up. If the sense voltage is still above VCUT when the tICUT timer expires, the LTC4259A will turn off the power to the port immediately and set the appropriate tICUT Fault bit in register 06h/07h. The tICUT timer duration can be pro- grammed via register 16h, bits 3 and 2 (Table 1). The tICUT timer is an up/down counter that is designed to protect the external MOSFET from thermal stress caused by repeatedly operating in current limit. The counter counts up whenever the current is above ICUT and counts down at 1/16th the rate when it is not. The counter will bottom out at zero to prevent underflow. Full count indi- cates that the tICUT timer has expired and the port will be turned off. This count up/count down behavior implements duty cycle protection, preventing intermittent current limit faults from causing cumulative thermal stress in the MOSFET. If the port enters current limit but then exits before the timer expires, the count will decrease slowly, giving the ICUT timer the ability to turn off sooner in the case of a repetitive fault. If the overcurrent duty cycle is less than 6.3% the tICUT timer will be fully reset. If the tICUT timer expires and causes the port to shut off, the timer will continue to run, counting down at the slow 1/16th rate and preventing the port from being repowered until the count returns to zero. This protects the MOSFET from damage due to a faulty PD that may still have a valid signature, or from errant software that repeatedly writes to the Power On bit. The port will not repower until after the tICUT counter returns to zero. In manual and semiauto modes the power enable command must be received after the tICUT counter reaches zero. In auto mode the LTC4259A must complete a valid detection cycle after the tICUT counter reaches zero. tSTART Timing To distinguish between normal turn-on current limit be- havior and current limit faults which occur after power-up is complete, the LTC4259A starts a timer (the tSTART timer) whenever a power-up sequence begins. The tSTART timer serves three functions. First and fore- most, it allows the user to specify a different current limit timeout (tSTART instead of tICUT) during turn-on (current limit duty cycle protection remains functional). Second, the DC disconnect timer is disabled during this period and can only begin counting up after the tSTART timer has expired. Together, these two features let the PD draw the maximum current IINRUSH to charge its input capacitance, boot up and begin drawing power without triggering a tSTART fault. Finally, if the device is in current limit for the entire tSTART period, a tSTART fault will be generated instead of a tICUT fault. This can be useful for tracking down the cause of a current fault. As long as the PD draws less than ICUT at the end of tSTART and begins drawing the minimum current within tDIS after tSTART expires (if DC disconnect is enabled), no faults will be indicated. The tSTART timer also implements the duty cycle protec- tion described under tICUT timing and its duration can be programmed via register 16h, bits 5 and 4 (Table 1). APPLICATIO S I FOR ATIO |
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