LPC2131 datasheet(22/41 Pages) PHILIPS

22 / 41 page

9397 750 14868

Preliminary data sheet

Rev. 02 — 15 April 2005

22 of 41

Philips Semiconductors

LPC2131/2132/2134/2136/2138

Single-chip 16/32-bit microcontrollers

6.15 SPI serial I/O controller

The LPC2131/2132/2134/2136/2138 each contain one SPI controller. The SPI is a full

duplex serial interface, designed to be able to handle multiple masters and slaves

connected to a given bus. Only a single master and a single slave can communicate on

the interface during a given data transfer. During a data transfer the master always sends

a byte of data to the slave, and the slave always sends a byte of data to the master.

6.15.1 Features

• Compliant with Serial Peripheral Interface (SPI) speciﬁcation.

• Synchronous, Serial, Full Duplex, Communication.

• Combined SPI master and slave.

• Maximum data bit rate of one eighth of the input clock rate.

6.16 SSP serial I/O controller

The LPC2131/2132/2134/2136/2138 each contain one Serial Synchronous Port controller

(SSP). The SSP controller is capable of operation on a SPI, 4-wire SSI, or Microwire bus.

It can interact with multiple masters and slaves on the bus. However, only a single master

and a single slave can communicate on the bus during a given data transfer. The SSP

supports full duplex transfers, with frames of 4 bits to 16 bits of data ﬂowing from the

master to the slave and from the slave to the master. Often only one of these data ﬂows

carries meaningful data.

6.16.1 Features

• Compatible with Motorola SPI, 4-wire TI SSI and National Semiconductor Microwire

buses.

• Synchronous Serial Communication.

• Master or slave operation.

• 8-frame FIFOs for both transmit and receive.

• Four bits to 16 bits per frame.

6.17 General purpose timers/external event counters

The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an

externally supplied clock, and optionally generate interrupts or perform other actions at

speciﬁed timer values, based on four match registers. It also includes four capture inputs

to trap the timer value when an input signal transitions, optionally generating an interrupt.

Multiple pins can be selected to perform a single capture or match function, providing an

application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among them.

At any given time only one of peripheral’s capture inputs can be selected as an external

event signal source, i.e., timer’s clock. The rate of external events that can be successfully

counted is limited to PCLK/2. In this conﬁguration, unused capture lines can be selected

as regular timer capture inputs.

6.17.1 Features

• A 32-bit Timer/Counter with a programmable 32-bit Prescaler.

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