MFC2000 datasheet(268/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

14-2

Conexant

100723A

S yste m D a ta B u s

H o ld in g R egister

Q uad H a lfw o rd 0

Q uad H a lfw o rd 1

Q uad H a lfw o rd 2

Q uad H a lfw o rd 3

FIFO

C ontro l

Local D a ta B u s

Figure 14-2. Compressor/Decompressor FIFO Structure

14.2 Register Description

Address

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default

T4 Configuration

(T4Config)

$01FF8171

(Not Used)

Disable

Hardware

DMA CH10

Disable

Hardware

DMA CH6

Disable

Hardware

DMA CH7

Rst. Value

xxxxx000b

Read Value:

00000000b

Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

T4 Configuration

(T4Config)

$01FF8170

(Not Used)

Enable

smart EOL

operation

Enable non-

inverted

flush (zero

fill)

Compressed data

src./dest.

00=T4Data0

01=T4Data1

10=T4Data2

11=T4Data3

Enable

Decompressi

T4 Coding/Decoding Mode

00=MH

01=MR 1-dimensional

10-MR 2-dimensional

11=MMR

Rst. Value

x0000000b

Read Value:

00000000b

Bit 15-11:

Not used

Bit 10:

Disable coded hardware DMA.

Setting this bit to 1 disables hardware DMA accesses to the coded

data FIFOs (DMA CH10). Clearing this bit allows hardware DMA to the

coded data FIFOs. This bit should be set when firmware DMA is to be

carried out to the coded data FIFO.

Bit 9:

Disable uncoded hardware DMA.

Setting this bit to 1 disables hardware DMA accesses to the uncoded

data FIFO (DMA CH6). Clearing this bit allows hardware DMA to the

uncoded data FIFO. This bit should be set when firmware DMA is to

be carried out to the uncoded data FIFO.

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