MFC2000 datasheet(231/426 Pages) ETC

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Multifunctional Peripheral Controller 2000

MFC2000

100723A

Conexant

10-1

10. External Print ASIC Interface

The interface signals used between the MFC2000 and the external Print ASIC are described in this section. They

are basically the external ARM system bus interface signals. Conexant’s Alcore chip is an external Print ASIC and

it has the P1284 master port to talk to the P1284 slave port in the Printer.

10.1 Interface Between the MFC2000 and External Print ASIC

The MFC2000 ASIC is the master that controls the system bus and all other control signals. The MFC2000

firmware configures and controls the external Print ASIC by setting registers in the external Print ASIC through

the system bus. See Figure 10-1.

AUXCLK can be used as the clock base for the external Print ASIC. No matter AUXCLK or external OSC is used

for the external Print ASIC, the external Print ASIC needs to resynchronize all the signals and accesses for the

metastable problems caused by different clocks. The MFC2000 internally uses SIUCLK and ICLK which are

different from the external Print ASIC.

The interrupt PRTIRQn is used to tell the MFC2000 that further settings or actions are needed for the external

Print ASIC. The register bits in the external Print ASIC may be used to indicate which settings or actions need to

be performed. If the extra interrupt channel is required, the external IRQ13n and IRQ11 can be also used for the

external Print ASIC. These three interrupt input signals are resynchronized twice for the metastable issues.

The external Print ASIC needs to be designed with the compatible CPU read/write bus timing and DMA bus timing

used in the MFC2000 ASIC.

The external DMA channel between the MFC2000 ASIC and the external Print ASIC is DMA channel 2. The

external Print ASIC may get the print data from the bit rotation block if the bit rotation block is used or get the print

data from the external memory if the bit rotation is done by host or the external Print ASIC.

The external Print ASIC gets the print data from the external memory. When the external Print ASIC

generates the DMA request (DMAREQ2) to request the printing data, the MFC2000 will respond with the

DMA acknowledge (DMAACK2) at the valid access cycle. At the same cycle, the MFC2000 will generate the

read strobe, address, and the external chip select signals to read one byte or halfword of print data out of the

external memory and put on the data bus. At the rising edge of the read strobe when DMAACK2 is high

(DMAACK acts as a chip select), the external Print ASIC latches this one byte or halfword printing data in. If

additional data bytes or halfwords are required by the external ASIC, it may leave the DMAREQ2 active. If no

additional data is required, the ASIC should pull the DMAREQ2 inactive immediately after DMAACK goes low.

DMA address will be incremented, decremented, or jumped during the DMA operation according to the fetch

order of the print data in the external memory (See the DMA Controller Section).

Note: No matter the data bus is byte or halfword wide, the memory data bus size must match

with the data bus size of the external Print ASIC. The Endian control bit for the DMA2 needs to

be 0. The Endian mode can’t be changed during the DMA operation.

The external Print ASIC gets the print data from the bit rotation block.

When the external Print ASIC generates the DMA request (DMAREQ2) to request the printing data, the

MFC2000 will respond with the DMA acknowledge (DMAACK2) at the valid access cycle after the print data

ready in the output register of the Bit Rotation Block. At the same cycle, the MFC2000 will generate the read

strobe, address, and internal chip select signals to read one halfword of print data out of the output register of

the Bit Rotation block and put on the data bus. The MFC2000’s SIU may generate two access cycles for the

byte-wide external data bus (the bit 8 of the DMA2Config register needs to be set to 0) or one access cycle

for the halfword-wide external data bus (the bit 8 of the DMA2Config register needs to be set to 1). At the

rising edge of the each read strobe when DMAACK2 is high (DMAACK acts as a chip select), the external

Print ASIC latches this one byte or halfword printing data in. If additional data bytes or halfwords are required

by the external ASIC, it may leave the DMAREQ2 active. If no additional data is required, the ASIC should

pull the DMAREQ2 inactive immediately after DMAACK goes low. The DMA address is fixed during the DMA

operation (See the DMA Controller section and the Bit Rotation section).

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