MFC2000 datasheet(210/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

8-6

Conexant

100723A

8.2.2

Name/Address

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default

TADC Control

(TADCCtrl)

$01FF8001

(Not Used)

Rst. Value

xxh

Read Value

00h

Name/Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

TADC Control

(TADCCtrl)

$01FF8000

(Not Used)

Tadcclk

Select[1]

Tadcclk

Select[0]

Update

Select[1]

Update

Select[0]

Channel

Select[1]

Channel

Select[0]

Mode

Rst. Value

x0000000b

Read Value

00h

Bit 6-5

Tadcclk Select[1:0]

The frequency for tadc counter is programmable according to the

following table.

Tadcclk Select[1:0]

Tadcclk Frequency

(assuming iclk = 10MHz)

freq(iclk)/64

156 KHz

freq(iclk)/16

625 KHz

freq(iclk)/8

1.25 MHz

freq(iclk)/4

2.5 MHz

Bit 4-3

Update Select[1:0]

In the auto mode, the frequency of updating each register is

determined by the setting on these bits.

Update Select[1:0]

Update Frequency

(with tadcclk = 156 KHz)

Update Frequency

(with tadcclk = 5 MHz)

freq(tadcclk)/2048

76 Hz

2.4 KHz

freq(tadcclk)/1024

152 Hz

4.8 KHz

freq(tadcclk)/512

304 Hz

9.8 KHz

freq(tadcclk)/256

609 Hz

19.5 KHz

Bit 2-1

Channel Select [1:0]

This channel selection is only valid for manual mode (i.e., Mode = 0).

Channel Select[1:0]

Selected Channel

senin[0]

senin[1]

senin[2]

TADCREF

Bit 0

Mode

When mode = 0, then the manual mode is selected. In this manual

mode, the channel selected must be done by the firmware, by setting

the desired channel selection in bit 2 & bit1. When mode = 1, then the

automatic mode is selected. In this auto mode, the selection for the

analog mux will be performed automatically by the hardware, and the

data on three registers corresponding to each channel will be updated

accordingly.

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