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STA311B датащи(PDF) 37 Page - STMicroelectronics |
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STA311B датащи(HTML) 37 Page - STMicroelectronics |
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37 / 102 page ![]() DocID024340 Rev 1 37/102 STA311B Registers 102 8.2.4 Configuration register D (0x03) The FFX power output mode selects how the FFX output timing is configured. Different power devices use different output modes. The STA50x recommended use is OM = 10. D7 D6 D5 D4 D3 D2 D1 D0 MPC CSZ4 CSZ3 CSZ2 CSZ1 CSZ0 OM1 OM0 11 111 11 0 Bit RW RST Name Description 0RW 0 OM0 FFX power output mode: selects configuration of FFX output 1RW 1 OM1 OM[1,0] Output stage - mode 00 STA50x/STA51xB - drop compensation 01 Discrete output stage - tapered compensation 10 STA50x/STA51xB - full-power mode 11 Variable drop compensation (CSZn bits) Bit RW RST Name Description 2RW 1 CSZ0 Contra size register: when OM[1,0] = 11, this register determines the size of the FFX compensating pulse from 0 clock ticks to 31 clock periods 3RW 1 CSZ1 4RW 1 CSZ2 5RW 1 CSZ3 6RW 1 CSZ4 CSZ[4:0] Compensating pulse size 00000 0 clock period compensating pulse size 00001 1 clock period compensating pulse size …… 11111 31 clock period compensating pulse size Bit RW RST Name Description 7RW 1 MPC Max power correction: setting of 1 enables STA50x correction for THD reduction near maximum power output. |
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