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STA311B датащи(PDF) 65 Page - STMicroelectronics |
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STA311B датащи(HTML) 65 Page - STMicroelectronics |
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65 / 102 page ![]() DocID024340 Rev 1 65/102 STA311B Registers 102 8.2.75 Coefficient b0 data register, bits 23:16 (0x49) 8.2.76 Coefficient b0 data register, bits 15:8 (0x4A) 8.2.77 Coefficient b0 data register, bits 7:0 (0x4B) 8.2.78 Coefficient write control register (0x4C) Coefficients for EQ and Bass Management are handled internally in the STA311B via RAM. Access to this RAM is available to the user via an I²C register interface. A collection of I²C registers are dedicated to this function. One contains a coefficient base address, five sets of three store the values of the 24-bit coefficients to be written or that were read, and one contains bits used to control the write of the coefficient(s) to RAM. The following are instructions for reading and writing coefficients. D7 D6 D5 D4 D3 D2 D1 D0 C5B23 C5B22 C5B21 C5B20 C5B19 C5B18 C5B17 C5B16 00 000 00 0 D7 D6 D5 D4 D3 D2 D1 D0 C5B15 C5B14 C5B13 C5B12 C5B11 C5B10 C5B9 C5B8 00 000 00 0 D7 D6 D5 D4 D3 D2 D1 D0 C5B7 C5B6 C5B5 C5B4 C5B3 C5B2 C5B1 C5B0 00 000 00 0 D7 D6 D5 D4 D3 D2 D1 D0 WA W1 00 |
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