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STM32L100RC датащи(PDF) 93 Page - STMicroelectronics

номер детали STM32L100RC
подробное описание детали  Reset and supply management
PDF  104 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32L100RC датащи(HTML) 93 Page - STMicroelectronics

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STM32L100RC
96
Figure 26. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external
loads directly without the use of an external operational amplifier. The buffer can be bypassed by
configuring the BOFFx bit in the DAC_CR register.
6.3.19
Operational amplifier characteristics
4. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095.
5. Difference between the value measured at Code (0x800) and the ideal value = VREF+/2.
6. Difference between the value measured at Code (0x001) and the ideal value.
7. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 0xFFF when
buffer is OFF, and from code giving 0.2 V and (VDDA – 0.2) V when buffer is ON.
8. In buffered mode, the output can overshoot above the final value for low input code (starting from min value).
Table 58. Operational amplifier characteristics
Symbol
Parameter
Condition(1)
Min(2)
Typ
Max(2)
Unit
CMIR
Common mode input range
-
0
-
VDD
VIOFFSET
Input offset voltage
Maximum
calibration range
--
-
±15
mV
After offset
calibration
--
-
±1.5
ΔVIOFFSET
Input offset voltage
drift
Normal mode
-
-
-
±40
µV/°C
Low-power mode
-
-
-
±80
IIB
Input current bias
Dedicated input
75 °C
--
1
nA
General purpose
input
--
10
ILOAD
Drive current
Normal mode
-
-
-
500
µA
Low-power mode
-
-
-
100
IDD
Consumption
Normal mode
No load,
quiescent mode
-
100
220
µA
Low-power mode
-
30
60
CMRR
Common mode
rejection ration
Normal mode
-
-
-85
-
dB
Low-power mode
-
-
-90
-



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