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STM32L100RC датащи(PDF) 68 Page - STMicroelectronics |
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STM32L100RC датащи(HTML) 68 Page - STMicroelectronics |
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68 / 104 page ![]() Electrical characteristics STM32L100RC 68/104 DocID024995 Rev 4 6.3.8 PLL characteristics The parameters given in Table 32 are derived from tests performed under the conditions summarized in Table 12. 6.3.9 Memory characteristics The characteristics are given at TA = -40 to 105 °C unless otherwise specified. RAM memory Table 32. PLL characteristics Symbol Parameter Value Unit Min Typ Max(1) 1. Guaranteed by characterization results, not tested in production. fPLL_IN PLL input clock(2) 2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with the range defined by fPLL_OUT. 2- 24 MHz PLL input clock duty cycle 45 - 55 % fPLL_OUT PLL output clock 2 - 32 MHz tLOCK PLL lock time PLL input = 16 MHz PLL VCO = 96 MHz -115 160 µs Jitter Cycle-to-cycle jitter - - ±600 ps IDDA(PLL) Current consumption on VDDA -220 450 µA IDD(PLL) Current consumption on VDD -120 150 Table 33. RAM and hardware registers Symbol Parameter Conditions Min Typ Max Unit VRM Data retention mode(1) 1. Minimum supply voltage without losing data stored in RAM (in Stop mode or under Reset) or in hardware registers (only in Stop mode). STOP mode (or RESET) 1.65 - - V |
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