STM8TL53X4 datasheet(62/84 Pages) STMICROELECTRONICS

номер детали	STM8TL53x4

подробное описание детали	Operating conditions

PDF	84 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

Logo

62 / 84 page

Electrical parameters

STM8TL52x4 STM8TL53x4

62/84

DocID022344 Rev 7

NRST pin

The NRST pin input driver is CMOS. A permanent pull-up is present which is the same as

RPU (see Table 31 on page 56).

Subject to general operating conditions for VDD and TA unless otherwise specified.

The reset network shown in Figure 26 protects the device against parasitic resets. The user

must ensure that the level on the NRST pin can go below the VIL max. level specified in

Table 33

. Otherwise the reset is not taken into account internally.

Figure 25. Typical NRST pull-up resistance RPU vs. VDD

Table 33. NRST pin characteristics

Symbol

Parameter

Conditions

Min.

Typ.(1)

1. Data based on characterization results, not tested in production.

Max.

Unit

VIL(NRST) NRST input low level voltage(1)

-VSS

-0.8

VIH(NRST) NRST input high level voltage(1)

-1.4

VDD

VOL(NRST) NRST output low level voltage

IOL = 2 mA

VDD-

0.8

RPU(NRST) NRST pull-up equivalent resistor(2)

2. The RPU pull-up equivalent resistor is based on a resistive transistor.

-30



VF(NRST)

NRST input filtered pulse(3)

3. Data guaranteed by design, not tested in production.

tOP(NRST) NRST output pulse width

VNF(NRST) NRST input not filtered pulse(3)

-300

STM8TL53x4 датащи(PDF) 62 Page - STMicroelectronics

STM8TL53x4 датащи(HTML) 62 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

датащи скачать

ссылки URL