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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F296 датащи(PDF) 219 Page - STMicroelectronics |
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ST10F296 датащи(HTML) 219 Page - STMicroelectronics |
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219 / 346 page  Obsolete Product(s) - Obsolete Product(s) ST10F296E System reset 219/346 20.2.3 Exit from asynchronous reset state When the RSTIN pin is pulled high, the device restarts. If the internal Flash is used, restarting occurs after the embedded Flash initialization routine is completed. The system configuration is latched from Port 0. ALE, RD and WR/WRL pins are driven to their inactive level. The ST10F296E starts program execution from memory location 00'0000h in code segment 0. This starting location typically points to the general initialization routine. Timing of asynchronous hardware reset sequences are summarized in Figure 77 and Figure 78. Figure 77. Asynchronous hardware reset (EA = 1) 1. Longer than Port 0 settling time + PLL synchronization (if needed, that is P0(15:13) changed) Longer than 500 ns to take account of input filter on RSTIN pin. RSTF P0[15:13] P0[12:2] Transparent Transparent Not t. P0[1:0] Not t. Not transparent FLARST ≤2 TCL RST ≤1 ms Latching point of Port 0 for system start-up configuration RPD IBUS-CS (1) Not transparent Not transparent (after filter) RSTIN ≤500 ns ≥ 50 ns ≤500 ns ≥ 50 ns 7 TCL (internal) 3..4 TCL Not t. Not t. Obsolete Product(s) - Obsolete Product(s) |
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