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ST7FOXA0 датащи(PDF) 106 Page - STMicroelectronics

номер детали ST7FOXA0
подробное описание детали  8-bit MCU with single voltage Flash memory
PDF  123 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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ST7FOXA0 датащи(HTML) 106 Page - STMicroelectronics

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Electrical characteristics
ST7FOXA0
106/123
Figure 39.
RESET pin protection when LVD is enabled
1.
The reset network protects the device against parasitic resets. The output of the external reset circuit must
have an open-drain output to drive the ST7 reset pad. Otherwise the device can be damaged when the
ST7 generates an internal reset (LVD or watchdog). Whatever the reset source is (internal or external), the
user must ensure that the level on the RESET pin can go below the VIL max. level specified in
Section 12.9.1 on page 105. Otherwise the reset will not be taken into account internally. Because the
reset circuit is designed to allow the internal Reset to be output in the RESET pin, the user must ensure
that the current sunk on the RESET pin is less than the absolute maximum value specified for IINJ(RESET) in
Section Table 40. on page 94.
2.
When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-
down capacitor is required to filter noise on the reset line.
3.
In case a capacitive power supply is used, it is recommended to connect a 1M
Ω pull-down resistor to the
RESET pin to discharge any residual voltage induced by the capacitive effect of the power supply (this will
add 5µA to the power consumption of the MCU).
Tips when using the LVD
●
Check that all recommendations related to ICCCLK and reset circuit have been applied
(see caution in Table 2 on page 11 and notes above).
●
Check that the power supply is properly decoupled (100nF + 10µF close to the MCU).
Refer to AN1709 and AN2017. If this cannot be done, it is recommended to put a
100nF + 1M
Ω pull-down on the RESET pin.
●
The capacitors connected on the RESET pin and also the power supply are key to
avoid any start-up marginality. In most cases, steps 1 and 2 above are sufficient for a
robust solution. Otherwise: replace 10nF pull-down on the RESET pin with a 5µF to
20µF capacitor.”
0.01
µF
ST7xxx
PULSE
GENERATOR
Filter
RON
VDD
INTERNAL
RESET
RESET
EXTERNAL
Required
1M
Ω
Optional
(note 3)
WATCHDOG
LVD RESET
ILLEGAL OPCODE
Obsolete
Product(s)
- Obsolete
Product(s)



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