PC87332VLJ datasheet(15/98 Pages) NSC

15 / 98 page

10 Pin Description (Continued)

Symbol

Function

STB

Data Strobe

This output signal indicates to the printer that valid data is available at the printer port

This pin is in a TRl-STATE condition 10 ns aftera0is loaded into the corresponding Control Register

bit The system should pull this pin high using a 47 kX resistor (See WRlTE for further information)

STEP

Normal

Step

This output signal issues pulses to the disk drive at a software programmable rate to move the

head during a seek operation

Mode

STEP

PPM

Step

This pin provides an additional step signal in PPM Mode when PNF e 0 (See SLIN ASTRB

and Table 7-5 for further information)

Mode

TerminaI Count

Control signal from the DMA controller to indicate the termination of a DMA

transfer TC is accepted only when FDACK is active TC is active high in PC-AT and Model 30

modes and active low in PS2 mode

TRK0

Normal

Track 0

This input indicates to the controller that the head of the selected floppy disk drive is at

track zero

Mode

TRK0

PPM

Track 0

This pin provides an additional Track 0 signal in PPM Mode when PNF e 0 (See PD1 and

Table 7-5 for further information)

Mode

VDDB

50 99

Power Supply

This is the 33V or 5V supply voltage for the PC87332 circuitry

VDDC

VLD01

56 63

Valid Data

These input pins are sensed during reset and indicate the state of bit 5 in the FDC Tape

Drive Register (3F3h) They indicate whether bits 6 and 7 of this register contain valid media ID

information for floppy drives 0 and 1 If VLD0 is sensed low at reset then whenever drive 0 is

accessed bit 5 of the Tape Drive Register is a 0 indicating that bits 6 and 7 contain valid media ID

information If VLD0 is sensed high at reset then whenever drive 0 is accessed bit 5 of the Tape

Drive Register is a 1 indicating that bits 6 and 7 do not contain valid media ID information The same

is true of VLD1 relative to the media ID information for drive 1

If bit 0 of FCR is 1 the VLD bits have no meaning VLD0 value during reset is loaded into bit 0 of

FCR (to select between media sense or DRATE) A 30 kX internal pull-down resistor is on each pin

Usea10kX resistor to pull these pins to high during reset

VSSB VSSC

42 9

Ground

This is the ground for the PC87332 circuitry

VSSD VSSE

90 61

WAIT

Wait

This signal is used in EPP mode by the parallel port device to extend its access cycle It is

active low (See BUSY and Table 7-5 for further information)

Write

Active low input signal to indicate a write from the microprocessor to the controller

WDATA

Normal

Write Data

This output is the write precompensated serial data that is written to the selected floppy

disk drive Precompensation is software selectable

Mode

WDATA

PPM

Write Data

This pin provides an additional Write Data signal in PPM Mode when PNF e 0 (See PE

and Table 7-5 for further information)

Mode

WGATE

Normal

Write Gate

This output signal enables the write circuitry of the selected disk drive WGATE has

been designed to prevent glitches during power up and power down This prevents writing to the disk

Mode

when power is cycled

WGATE

PPM

Write Gate

This pin provides an additional Write Gate signal in PPM Mode when PNF e 0 (See

SLCT and Table 7-5 for further information)

Mode

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