PC87332VLJ datasheet(14/98 Pages) NSC

14 / 98 page

10 Pin Description (Continued)

Symbol

Function

PDACK

Printer DMA Acknowledge

Active low input to acknowledge the printer DMA request and enable the

RD and WR inputs during a DMA transfer This pin is PDACK input pin when bit 3 of PMC is 1 It is

IDENT when bit 3 of PMC is 0 PDACK input pin is ECP DMA acknowledge

PDACK is assumed to be 1 when bit 3 of PMC is 0

IDENT is assumed to be 1 when bit 3 of PMC is 1

This input is valid only in ECP mode

PDRQ

Printer DMA Request

Active high output to signal the DMA controller that a printer data transfer is

required This pin is in TRI-STATE when ECP is disabled (bit 2 of PCR is 0) or configured with no DMA

(bit 3 of PMC is 0) This output is valid only in ECP mode

PWDN

Power Down

This multi-function pin stops the clocks andor the external crystal based on the

selections made in the Power and Test Register bits 1-2 This pin also affects the FDC UARTs IDE

and Parallel Port pins when the relevant PMC register bits are set (See ZWS for further information)

Paper End

This input is set high by the printer when it is out of paper This pin has a nominal 25 kX

pull-down resistor attached to it (See WDATA and Table 7-5 for further information)

PNF

Printer Not Floppy

PNF is the Printer Not Floppy pin when bit 2 of FCR is 1 It selects the device

which is connected to the PPM pins A parallel printer is connected when PNF e 1 and a floppy disk

drive is connected when PNF e 0 This pin is the DRV2 input pin when bit 2 of FCR is 0 (See DRV2 for

further information)

Read

Active low input to signal data read by the microprocessor

RDATA

Normal

Read Data

This input is the raw serial data read from the floppy disk drive

Mode

RDATA

PPM

Read Data

This pin provides an additional Read Data signal in PPM Mode when PNF e 0 (See PD3

and Table 7-5 for further information)

Mode

RI12

70 62

Ring Indicator

When low this indicates that a telephone ring signal has been received by the MODEM

The RI signal is a MODEM status input whose condition the CPU can test by reading bit 6 (RI) of the

MODEM Status Register (MSR) for the appropriate serial channel Bit 6 is the complement of the RI

signal Bit 2 (TERI) of the MSR indicates whether the RI input has changed from low to high since the

previous reading of the MSR

Note

When the TERI bit of the MSR is set an interrupt is generated if MODEM Status interrupts are enabled

RTS12

74 66

Request to Send

When low this output indicates to the MODEM or data set that the UART is ready to

exchange data The RTS signal can be set to an active low by programming bit 1 (RTS) of the MODEM

Control Register to a high level A Master Reset operation sets this signal to its inactive (high) state

Loop mode operation holds this signal to its inactive state (See CFG0 – 4 for further information)

SIN12

75 67

Serial Input

This input receives composite serial data from the communications link (eg peripheral

device MODEM or data set)

SLCT

Select

When a printer is connected it sets this input high This pin has a nominal 25 kX pull-down

resistor attached to it

SLIN

Select Input

When this signal is low it selects the printer This pin is in a TRI-STATE condition 10 ns

aftera0is loaded into the corresponding Control Register bit The system should pull this pin high

using a 47 kX resistor (See ASTRB STEP and Table 7-5 for further information)

SOUT12

73 65

Serial Output

This output signal sends composite serial data to the communications link (eg

peripheral device MODEM or data set) The SOUT signal is set to a marking state (logic 1) after a

Master Reset operation (See BOUT and CFG0 – 4 for further information)

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