P87C51MB2BA datasheet(19/34 Pages) PHILIPS

19 / 34 page

2001 Apr 06

Philips Semiconductors

Preliminary specification

P87C51MB2/P87C51MC2

80C51 8-bit microcontroller family with extended memory

64KB/96KB OTP with 2KB/3KB RAM

DC ELECTRICAL CHARACTERISTICS

VDD = 2.7V to 5.5V unless otherwise specified;

Tamb = 0 to +70°C for commercial, unless otherwise specified.

Notes:

1. Typical ratings are not guaranteed. The values listed are at room temperature (+25°C), 5V, unless otherwise stated.

2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOL of ALE and ports 1, 3 and 4.

The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0

transitions during bus operations. In the worst cases (capacitive loading>100 pF), the noise pulse on the ALE pin may exceed

0.8 V. In such cases, it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger

STROBE input. IOL can exceed these conditions provided that no single output sinks more than 5mA and no more than two

outputs exceed the test conditions.

3. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the VDD-0.7V

specification when the address bits are stabilizing.

4. Pins of ports 1, 2, 3 and 4 source a transition current when they are being externally driven from 1 to 0. The transition current

reaches its maximum value when VIN is approximately 2 V for 4.5V < VDD < 5.5V.

5. See Figures 13 through 16 for ICC test conditions. fOSC is the oscillator frequency in MHz.

6. This value applies to Tamb = 0°C to +70°C.

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNIT

MIN

TYP1

MAX

VIL

Input low voltage

-0.5

0.2VDD-0.1

VIH

Input high voltage (ports 0, 1, 2, 3,

4, EA)

0.2VDD+0.9

VDD+0.5

VIH1

Input high voltage, XTAL1, RST

0.7VDD

VDD+0.5

VOL

Output low voltage, ports 1, 2, 3, 48 VDD = 2.7V, IOL = 1.6mA

0.4

VOL1

Output low voltage, port 0, ALE,

PSEN7,8

VDD = 2.7V, IOL = 3.2mA

0.4

VOH

Output high voltage, ports 1, 2, 3, 4

VDD = 4.5V, IOH = -30µA

VDD - 0.7

VDD = 2.7V, IOH = -10µA

VOH1

Output high voltage (port 0 in

external bus mode), ALE9, PSEN3

VDD = 2.7V, IOH = -3.2mA

VDD - 0.7

IIL

Logical 0 input current, ports 1, 2,

3, 4

VIN = 0.4V

-1

-75

µA

ITL

Logical 1 -to-0 transition current,

ports 1, 2, 3, 48

4.5V < VDD < 5.5V,

VIN = 2.0V, See Note 4

-650

µA

IL1

Input leakage current, port 0

0.45 < VIN < VDD-0.3

±10

µA

ICC

Power supply current

Active mode (see Note 5)

VDD = 5.5V

7 +

2.7 /MHz × fOSC

VDD = 3.6V

4 +

1.3 /MHz × fOSC

Idle mode (see Note 5)

VDD = 5.5V

4 +

1.3 /MHz × fOSC

VDD = 3.6V

1 +

1.0 /MHz × fOSC

Power-down mode or clock

stopped (see Figure 16 for

conditions)

VDD = 5.0V

µA

VDD = 5.5V

100

µA

RRST

Internal reset pull-down resistor

225

Ω

C10

Pin capacitance10 (except EA)

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