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L5988D датащи(PDF) 41 Page - STMicroelectronics |
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L5988D датащи(HTML) 41 Page - STMicroelectronics |
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41 / 52 page ![]() DocID15324 Rev 4 41/52 L5988D Application information 52 Figure 23. Measurement of the thermal impedance of the evaluation board As it can be see, for example, for load pulses with duration of 1 second, the actual thermal impedance is lower than 20 C/W. This means that, for short pulses, a current higher that 5 A (provided the current limitation is set correctly) can be managed. 6.7 Layout considerations The PC board layout of switching DC/DC regulator is very important to minimize the noise injected in high impedance nodes and interferences generated by the high switching current loops. The L5988D is a monolithic device so most of the critical path are designed internally minimizing the potential issues introduced by the board layout. In the operation of a step down converter two high current loops become evident and critical. The conduction of the high side switch highlight a current loop composed by the input capacitor, the inductor and the output capacitor whilst during the conduction of the low side switch the current flows from the power ground to the inductor and again the output capacitor. The first consideration is to keep the trace of the switching node as short as possible to reduce radiated emission. The bandwidth of the external power supply is limited if compared to the switching frequency of the device so the power supply delivers a certain RMS current in the switching period. As a consequence the input filter substains the input voltage during the conduction time of the HS switch delivering an impulsive extra current equal to ILOAD + IRIPPLE - IIN RMS and it is recharged during the conduction time of the low side by the external power supply. The golden rule is to reduce as much as possible the stray inductance of the path related to the capacitor and VINto reduce injected noise: the suggested layout (see Figure 24 and |
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