| поискавой системы для электроныых деталей |
|
MPC855 датащи(PDF) 65 Page - Motorola, Inc |
|
|
|||||||||||||||||||||||||||||
MPC855 датащи(HTML) 65 Page - Motorola, Inc |
|
65 / 76 page ![]() MOTOROLA MPC860 Family Hardware Specifications 65 UTOPIA AC Electrical Specifications Figure 11-67 shows the I2C bus timing. Figure 11-67. I2C Bus Timing Diagram Part XII UTOPIA AC Electrical Specifications Table 12-26 shows the AC electrical specifications for the UTOPIA interface. Figure 12-68 shows signal timings during UTOPIA receive operations. 1 SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3) × pre_scaler × 2). The ratio SYNCCLK/(BRGCLK / pre_scaler) must be greater or equal to 4/1. Table 12-26. UTOPIA AC Electrical Specifications Num Signal Characteristic Direction Min Max Unit U1 UtpClk rise/fall time (Internal clock option) Output — 3.5 ns Duty cycle 50 50 % Frequency — 50 MHz U1a UtpClk rise/fall time (external clock option) Input — 3.5 ns Duty cycle 40 60 % Frequency — 50 MHz U2 RxEnb and TxEnb active delay Output 2 16 ns U3 UTPB, SOC, Rxclav and Txclav setup time Input 8 — ns U4 UTPB, SOC, Rxclav and Txclav hold time Input 1 — ns U5 UTPB, SOC active delay (and PHREQ and PHSEL active delay in MPHY mode) Output 2 16 ns SCL 202 205 203 207 204 208 206 209 211 210 SDA |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |