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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC855 датащи(PDF) 57 Page - Motorola, Inc |
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MPC855 датащи(HTML) 57 Page - Motorola, Inc |
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57 / 76 page  MOTOROLA MPC860 Family Hardware Specifications 57 Ethernet Electrical Specifications Figure 11-56. HDLC Bus Timing Diagram 11.7 Ethernet Electrical Specifications Table 11-20 provides the Ethernet timings as shown in Figure 11-57 through Figure 11-61. Table 11-20. Ethernet Timing Num Characteristic All Frequencies Unit Min Max 120 CLSN width high 40 — ns 121 RCLK1 rise/fall time — 15 ns 122 RCLK1 width low 40 — ns 123 RCLK1 clock period 1 80 120 ns 124 RXD1 setup time 20 — ns 125 RXD1 hold time 5 — ns 126 RENA active delay (from RCLK1 rising edge of the last data bit) 10 — ns 127 RENA width low 100 — ns 128 TCLK1 rise/fall time — 15 ns 129 TCLK1 width low 40 — ns 130 TCLK1 clock period1 99 101 ns 131 TXD1 active delay (from TCLK1 rising edge) 10 50 ns 132 TXD1 inactive delay (from TCLK1 rising edge) 10 50 ns 133 TENA active delay (from TCLK1 rising edge) 10 50 ns TCLK1 CTS1 (Echo Input) 102 100 104 TxD1 (Output) 102 101 RTS1 (Output) 103 104 107 105 |
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