(V

Symbol

Parameter

Conditions

Min

Typ

Max

Units

DIGITAL INTERFACE (DATA, CLK, LE, EN, FoLD)

I

IH

High-Level Input Current

V

−1.0

1.0

µA

I

IL

Low-Level Input Current

V

−1.0

1.0

µA

I

IH

OSC

V

100

µA

I

IL

OSC

V

−100

µA

I

O

OSC

(sink/source) (Note 5)

Logic Mode

V

(Note 3)

|200|

µA

V

Crystal Mode

V

(Note 3)

|300|

µA

V

OH

High-Level Output Voltage

I

V

V

V

OL

Low-Level Output Voltage

I

0.4

V

MICROWIRE TIMING

t

CS

Data to Clock Set Up Time

See Data Input Timing

50

ns

t

CH

Data to Clock Hold Time

See Data Input Timing

10

ns

t

CWH

Clock Pulse Width High

See Data Input Timing

50

ns

t

CWL

Clock Pulse Width Low

See Data Input Timing

50

ns

t

ES

Clock to Load Enable Set Up Time

See Data Input Timing

50

ns

t

EW

Load Enable Pulse Width

See Data Input Timing

50

ns

CLOSED LOOP SYNTHESIZER PERFORMANCE (NSC evaluation board only)

RF

φ

n

Main PLL Phase Noise Floor

(Note 6)

−160

dBc/Hz

Note 3: Refer to Programming Description 2.5.3.

Note 4: Except fin.

Note 5: The OSCout Output Current Magnitude is lass than or equal to 200µA when the Logic Mode is selected. The OSCout Output Current Magnitude is greater

than or equal to 300µA when the Crystal Mode is selected.

Note 6: Offset frequency = 1 kHz, fin = 900 MHz, f

of phase noise floor measurement.

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