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LM9833 датащи(PDF) 17 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали LM9833
подробное описание детали  LM9833 48-Bit Color, 1200dpi USB Image Scanner
PDF  42 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM9833 датащи(HTML) 17 Page - National Semiconductor (TI)

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STEPPER MOTOR CONTROL SETTINGS
43
n (Line Skipping)
Part of the “n out of m” function, consisting of
registers 43, 44, and 54 (bits 3-7).
t
ttttttt
n lines saved in DRAM for every m lines (register 44)
scanned, function bypassed if register value = 0.
n (lines saved per m lines scanned) = 256 - t
t = 256 - n
If t = 0 then function is bypassed.
44
m (Line Skipping)
Part of the “n out of m” function, consisting of
registers 43, 44, and 54 (bits 3-7).
m mmmmmmm
n lines (register 43) saved in DRAM for every m lines
scanned. m = 1 to 255.
If m = 0 then function is bypassed.
45
Full/Microstepping
0 Full Step Mode
1 Microstepping Mode
Current Sensing Phases
= 0 for fullstepping
= 1 for microstepping
0
1 Phase - No microstepping, just kickstart/stop
functions
1
2 Phases - necessary for microstepping
Stepper Motor Phase A Polarity
0
Positive (A/B/A/B Output high = winding energized)
1
Negative (A/B/A/B output low = winding energized)
WARNING: When idle, this setting leaves the motor
energized for unipolar motors, and will destroy bipolar
motor drivers. Keep this bit set to a 0.
Stepper Motor Phase B Polarity
0
Positive (A/B/A/B Output high = winding energized)
1
Negative (A/B/A/B output low = winding energized)
WARNING: When idle, this setting leaves the motor
energized for unipolar motors, and will destroy bipolar
motor drivers. Keep this bit set to a 0.
A, B, A, and B stepper motor status
0
A, B, A, and B output pins in Tri-State
1A, B, A, and B output pins active
Swap A/A with B/B
(Reverses motor direction)
0
Default polarity
1
Reverse Polarity
Fullstep During FastFeed at Start of Scan
0
Traditional Operation
1
Fullstep during fastfeed at start of scan
46
Scanning Step Size - MSB
n nnnnnnnThe step size of one microstep while scanning, in
units of pixel periods (minimum 2)
47
Scanning Step Size - LSB
n nnnnnnn
48
Fast Feed Step Size - MSB
nnnnnnThe step size of one microstep while fast feeding, in
units of pixel periods (minimum 2)
49
Fast Feed Step Size - LSB
n nnnnnnn
4A
Fullsteps to Skip at Start of Scan - MSB
nnnnnnnWhen scan starts, paper is fed forward n full steps (0 -
32767) at highest speed. For “zooming” in flatbeds
4B
Fullsteps to Skip at Start of Scan - LSB
n nnnnnnn
4C
Step Counter - MSB
nnnnnnCounts n (0-16383) full steps. See register 58, bit 5
for more information.
4D
Step Counter - LSB
n nnnnnnn
4E
Pause scanning, stop/reverse motor
n nnnnnnn
Pause scan when buffer is n*2 (16 x 256k) or
n*8 (16x1M) kbytes full
4F
Resume scanning, start motor
n nnnnnnn
Resume scan when buffer is n*2 (16 x 256k) or
n*8 (16x1M) kbytes full
50
Full steps to reverse when buffer is full
n nnnnnnnn (0-255) full steps (0 = do not reverse)
51
Acceleration Profile (stopped)
n n
n (0,1, 2, or 8) full step time units pause while stopped
Acceleration Profile (25%)
n n
n (0,1, 2, or 8) full steps at 25% speed
Acceleration Profile (50%)
n n
n (0,1, 2, or 8) full steps at 50% speed
Default Phase Difference - High Byte
n n 18 bit word used to calculate when motor resumes
after reversing and stopping. 1 < n < 262143. 2 bits in
register 51 are the most significant bits of 18 bit word.
52
Default Phase Difference - Mid Byte
n nnnnnnn
53
Default Phase Difference - Low Byte
n nnnnnnn
54
Lines to Process After Pause/
Lines to Discard after Resume
nnn
n (0-7) lines. This only applies if the motor doesn’t
reverse (reverse steps = 0)
Line Skipping Phase
Part of the “n out of m” function, consisting of
registers 43, 44, and 54 (bits 3-7).
0
Red sensor data arrives before Green sensor
1
Blue sensor data arrives before Green sensor
Line Skipping Color Phase Delay
Part of the “n out of m” function, consisting of
registers 43, 44, and 54 (bits 3-7).
n n n n
n lines, n = 0-15
Address
Function
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Value
Register Listing (Continued)



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