October 1999

3

Rev 1.200

Philips Semiconductors

Product specification

PSMN005-55B;

PSMN005-55P

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R

th j-mb

Thermal resistance junction

-

0.65

K/W

to mounting base

R

th j-a

Thermal resistance junction

SOT78 package, in free air

60

-

K/W

to ambient

SOT404 package, pcb mounted, minimum

50

-

K/W

footprint

AVALANCHE ENERGY LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

E

AS

Non-repetitive avalanche

Unclamped inductive load, I

-

268

mJ

energy

t

V

I

AS

Non-repetitive avalanche

-

75

A

current

ELECTRICAL CHARACTERISTICS

T

SYMBOL PARAMETER

CONDITIONS

MIN.

TYP. MAX. UNIT

V

(BR)DSS

Drain-source breakdown

V

55

-

-

V

voltage

T

50

-

-

V

V

GS(TO)

Gate threshold voltage

V

1.0

1.5

2.0

V

T

0.5

-

-

V

T

-

-

2.3

V

R

DS(ON)

Drain-source on-state

V

-

4.8

5.8

m

Ω

resistance

V

-

5.3

6.3

m

Ω

V

-

-

6.7

m

Ω

V

-

-

13.2

m

Ω

I

GSS

Gate source leakage current V

-

2

100

nA

I

DSS

Zero gate voltage drain

V

-

0.05

10

µA

current

T

-

-

500

µA

Q

g(tot)

Total gate charge

I

-

103

-

nC

Q

gs

Gate-source charge

-

15

-

nC

Q

gd

Gate-drain (Miller) charge

-

52

-

nC

t

d on

Turn-on delay time

V

-

45

-

ns

t

r

Turn-on rise time

V

-

180

-

ns

t

d off

Turn-off delay time

Resistive load

-

420

-

ns

t

f

Turn-off fall time

-

235

-

ns

L

d

Internal drain inductance

Measured from tab to centre of die

-

3.5

-

nH

L

d

Internal drain inductance

Measured from drain lead to centre of die

-

4.5

-

nH

(SOT78 package only)

L

s

Internal source inductance

Measured from source lead to source

-

7.5

-

nH

bond pad

C

iss

Input capacitance

V

-

6500

-

pF

C

oss

Output capacitance

-

1500

-

pF

C

rss

Feedback capacitance

-

700

-

pF