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AM79C970 датащи(PDF) 113 Page - Advanced Micro Devices |
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AM79C970 датащи(HTML) 113 Page - Advanced Micro Devices |
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113 / 168 page ![]() AMD P R E L I M I N A R Y 1-980 Am79C970 each new occurrence of the en- abled function for this LED output. A value of 0 disables the signal. A value of 1 enables the signal. 6 LNKSTE Link Status Enable. Indicates the current link status on the Twisted Pair interface. When this bit is en- abled, a value of ONE will be passed to the LEDOUT signal to indicate that the link status state is PASS. A value of ZERO will be passed to the LEDOUT signal to indicate that the link status state is FAIL. A value of 0 disables the signal. A value of 1 enables the signal. 5 RCVME Receive Match status Enable. In- dicates receive activity on the network that has passed the ad- dress match function for this node. All address matching modes are included: Physical, Logical filtering and Promiscuous. A value of 0 disables the signal. A value of 1 enables the signal. 4 XMTE Transmit status Enable. Indi- cates PCnet-PCI controller transmit activity. A value of 0 disables the signal. A value of 1 enables the signal. 3 RXPOLE Receive Polarity status Enable. Indicates the current Receive Polarity condition on the Twisted Pair interface. A value of ONE in- dicates that the polarity of the RXD ± pair has been reversed. A value of ZERO indicates that the polarity of the RXD ± pair has not been reversed. Receive polarity indication is valid only if the T-MAU is in the Link Pass state A value of 0 disables the signal. A value of 1 enables the signal. 2 RCVE Receive status Enable. Indicates receive activity on the network. A value of 0 disables the signal. A value of 1 enables the signal. 1 JABE Jabber status Enable. Indicates that the PCnet-PCI controller is jabbering on the network. A value of 0 disables the signal. A value of 1 enables the signal. 0 COLE Collision status Enable. Indi- cates collision activity on the net- work. A value of 0 disables the signal. A value of 1 enables the signal. BCR6: LED2 Status Bit Name Description 31–16 RES Reserved locations. Written as ZEROs and read as undefined. 15–0 LED2 Reserved locations. After H_RE- SET, the value in this register will be 0x0088h. The settings of this register will have no effect on any PCnet-PCI controller function. Writes to this register have no ef- fect on the operation of the PCnet-PCI controller. BCR7: LED3 Status Bit Name Description BCR7 controls the function(s) that the LED3 pin displays. Multi- ple functions can be simultane- ously enabled on this LED pin. The LED display will indicate the logical OR of the enabled func- tions. BCR7 defaults to Transmit Status (XMT) with pulse stretcher enabled (PSE = 1) and is fully programmable. The default setting after H_RE- SET for the LED3 register is 0090h. The LED3 register value is unaffected by S_RESET or STOP. 31–16 RES Reserved location. Written as ZEROs and read as undefined. 15 LEDOUT This bit indicates the current (non-stretched) value of the LED output pin. A value of ONE in this bit indicates that the OR of the enabled signals is true. The logical value of the LEDOUT status signal is determined by the settings of the individual Status Enable bits of the LED register (Bits 6–0). This bit is READ only by the host, and is unaffected by H_RESET, S_RESET or STOP. 14 LEDPOL LED Polarity. When this bit has the value ZERO, then the LED |
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