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AM79C970 датащи(PDF) 112 Page - Advanced Micro Devices |
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AM79C970 датащи(HTML) 112 Page - Advanced Micro Devices |
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112 / 168 page ![]() P R E L I M I N A R Y AMD 1-979 Am79C970 A value of 0 disables the signal. A value of 1 enables the signal. 5 RCVME Receive Match status Enable. In- dicates receive activity on the network that has passed the ad- dress match function for this node. All address matching modes are included: Physical, Logical filtering, Promiscuous and Broadcast. A value of 0 disables the signal. A value of 1 enables the signal. 4 XMTE Transmit status Enable. Indi- cates PCnet-PCI controller transmit activity. A value of 0 disables the signal. A value of 1 enables the signal. 3 RXPOLE Receive Polarity status Enable. Indicates the current Receive Polarity condition on the Twisted Pair interface. A value of ONE in- dicates that the polarity of the RXD ± pair has been reversed. A value of ZERO indicates that the polarity of the RXD ± pair has not been reversed. Receive polarity indication is valid only if the T-MAU is in Link Pass state. A value of 0 disables the signal. A value of 1 enables the signal. 2 RCVE Receive status Enable. Indicates receive activity on the network. A value of 0 disables the signal. A value of 1 enables the signal. 1 JABE Jabber status Enable. Indicates that the PCnet-PCI controller is jabbering on the network. A value of 0 disables the signal. A value of 1 enables the signal. 0 COLE Collision status Enable. Indi- cates collision activity on the net- work. A value of 0 disables the signal. A value of 1 enables the signal. BCR5: LED1 Status Bit Name Description BCR5 controls the function(s) that the LED1 pin displays. Multi- ple functions can be simultane- ously enabled on this LED pin. The LED display will indicate the logical OR of the enabled func- tions. BCR1 defaults to Receive Status (RCV) with pulse stretcher enabled (PSE = 1) and is fully programmable. The default setting after H_RE- SET for the LED1 register is 0084h. The LED1 register value is unaffected by S_RESET or STOP. 31–16 RES Reserved locations. Written as ZERO and read as undefined. 15 LEDOUT This bit indicates the current (non-stretched) value of the LED output pin. A value of ONE in this bit indicates that the OR of the enabled signals is true. The logical value of the LEDOUT status signal is determined by the settings of the individual Status Enable bits of the LED register (Bits 6–0). This bit is READ only by the host, and is unaffected by H_RESET, S_RESET or STOP. 14 LEDPOL LED Polarity. When this bit has the value ZERO, then the LED pin will be driven to a LOW level whenever the OR of the enabled signals is true and the LED pin will be disabled and allowed to float high whenever the OR of the enabled signals is false. (i.e. the LED output will be an Open Drain output and the output value will be the inverse of the LEDOUT status bit.) When this bit has the value ONE, then the LED pin will be driven to a HIGH level whenever the OR of the enabled signals is true and the LED pin will be driven to a LOW level whenever the OR of the enabled signals is false. (i.e. the LED output will be a Totem Pole output and the output value will be the same polarity as the LEDOUT status bit.) The setting of this bit will not af- fect the polarity of the LEDOUT bit for this register. 13 LEDDIS LED Disable. This bit is used to disable the LED output. When LEDDIS has the value ONE, then the LED output will always be tristated. When LEDDIS has the value ZERO, then the LED out- put value will be governed by the LEDOUT and LEDPOL values. 12–8 RES Reserved locations. Write as ZE- ROS, read as undefined. A value of 0 disables the signal. A value of 1 enables the signal. 7 PSE Pulse Stretcher Enable. Extends the LED illumination time for |
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