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7903A – AVR – 2006/02

How to Lower Power Consumption in Sleep Mode

Modern microcontrollers are built on digital CMOS logic that is in theory, only consuming

power when the logical or clock signals are changing state. A signal is toggled when it has

a transition from “0” to “1” or vice versa. Based on this theory, sleep current consumption

should be equal to zero. In real life, the picture is a bit more complex. Although sleep mode

power consumption approaches zero, current leakage and peripherals that remain active

can consume quite a bit of power.

Leakage Current

The temperature, the supply voltage and the process technology affect the leakage

current. Some microcontroller manufacturers use proprietary processes specifically

developed for low power operation based on years of research and experience. These

processes can provide sleep currents down to 100 nA due to the power-optimized process

and the ability to operate at a true 1.8V supply voltage. Some microcontrollers that claim

1.8V operation voltage actually must use voltages as high a 2.2V for analog modules or

flash writing to work properly. Atmel offers true 1.8V operation in which the memories and

analog modules all operate at 1.8V. Caution should be used when evaluating a

microcontroller’s supply voltage specifications to verify that the supply voltage is a “true”

1.8V.

The trend of smaller and smaller process technologies has become very popular in recent

years because they allow faster clocks and smaller die sizes. However, current leakage is

one of the real disadvantages of aggressive processes with small geometries. The rule of

thumb is that the leakage, and thus the sleep current, increase as the process geometries

decrease.

Process is also used very loosely. All microcontrollers are not usually made using a single

process but with several different processes that are specialized for different sections of

the device. The processes used for 8- and 16-bit microcontrollers typically range are from

0.50 down to 0.15 micron.

Active Peripherals

The biggest contributors to sleep mode power consumption are active peripherals.

Enabling internal analog or digital modules can cause a significant increase in the overall

current consumption but can be difficult to evaluate. While well-documented

microcontrollers describe this additional current consumption in their datasheet, others

claim that this current consumption equals zero. This is very seldom a correct statement

especially when it comes to analog features. When it is correct, the zero power features is

likely to have poor performance. The power consumption in digital logic is mainly due to

the toggling frequency, the capacitive load, and the supply voltage. The power

consumption in analog modules is, on the other hand, static. There is often a trade-off

between power consumption and robustness, accuracy, speed and fast start-up time in

analog modules. Decreasing power consumption also often decreases the quality of the

analog module.