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FPD87310 датащи(PDF) 22 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали FPD87310
подробное описание детали  Universal Interface XGA Panel Timing Controller with RSDS??(Reduced Swing Differential Signaling) and FPD-Link
PDF  28 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
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FPD87310 датащи(HTML) 22 Page - National Semiconductor (TI)

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Appendix A: GPO (General
Purpose Output) Programming
Examples (Continued)
GPO Programming Example #4b:
Generate a control signal which transitions low 20 output
clocks after the beginning of each output line, has a pulse-
width (low) of 12 µs, and goes high during horizontal blank-
ing.
This control signal is used as an output enable for the Row
Drivers.
Based on 65 MHz XGA video, 1024 pixel/line,
768 lines/frame.
Horizontal time (clocks/line) = 1300 dot clocks.
Vertical period (lines/frame) = 850 lines.
Vertical control is active beginning at line #2 and remains ac-
tive for line #768.
GPO Vertical Start Register = 2 (0002
H)
GPO Vertical Duration Register = 768 (0300
H)
Negative pulse goes low each line at 20 output clocks after
first pixel data are outputted on R, G, B. Pulse remains low
for 780 output clocks (12 µs/15.38 ns = 780).
Note: 4 pixel counts are added to the output data start # because the GPO
pixel count begins 4 clocks prior to output data. (Shown as “
Figure 17
Internal Pixel Position Counter”.
GPO Horizontal Start Register = 24 (0018
H)
GPO Horizontal Duration Register = 780 (030c
H)
The controlled pulses are negative (bit[0] = “1”) and the
toggle circuitry is disabled (bit[1] = “0”).
GPO Control Register = 1 (01
H) (00000001B)
DS101077-26
FIGURE 23. Example #4b: GPO Vertical Scope View
DS101077-27
FIGURE 24. Example #4b: GPO Horizontal Scope View
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