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FPD87310 датащи(PDF) 21 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали FPD87310
подробное описание детали  Universal Interface XGA Panel Timing Controller with RSDS??(Reduced Swing Differential Signaling) and FPD-Link
PDF  28 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
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FPD87310 датащи(HTML) 21 Page - National Semiconductor (TI)

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Appendix A: GPO (General Purpose Output) Programming Examples
(Continued)
GPO Programming Example #4a:
Generate a control signal which transitions high at end of
each line, has a pulse width of 0.5 µs, and remains low dur-
ing the vertical blanking period.
This control signal is used for latch pulse to the Column Driv-
ers.
Based on 65 MHz XGA video, 1024 pixel/line,
768 lines/frame.
Horizontal time (clocks/line) = 1300 dot clocks
Vertical period (lines/frame) = 850 lines
Vertical control is active beginning at line #1 and remains ac-
tive for line #768.
GPO Vertical Start Register = 1 (0001
H)
GPO Vertical Duration Register = 768 (0300
H)
Positive pulse goes high each line at 1024 output clocks af-
ter last pixel are outputted on R, G, B.
Pulse remains high for 32 output clocks (0.5 µs/15.38 ns =
32.5).
Note: 4 pixel counts are added to the output data start # because the GPO
pixel count begins 4 clocks prior to the output data. Shown as
Figure
17 “Internal Pixel Position Counter”.
GPO Horizontal Start Register = 1028 (0404
H)
GPO Horizontal Duration Register = 32 (0020
H)
The controlled pulses are positive (bit[0] = “0”) and the toggle
circuitry is disabled (bit[1] = “0”).
GPO Control Register = 0 (00
h) (00000000B)
DS101077-24
FIGURE 21. Example #4a: GPO Vertical Scope View
DS101077-25
FIGURE 22. Example #4a: GPO Horizontal Scope View
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