Reg 28h & Multiple Codec Option:

Reg

Name

D15 D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

28h

Extended

Audio ID

ID1

ID0

x

x

x

x AMAP

x

x

x

VRA

xxxxh

The AMAP bit, D9 in the Extended Audio ID Register (registers 28h), indicates whether or not the audio Codec supports Optional

AC’97 2.1 compliant AC-link slot to audio DAC mappings. AMAP = 1 in D9 indicates that the default (following cold or warm reset)

Codec slot to DAC mappings (configured via hardwirings, strap pin(s), or other methods) comform to the table below.

Codec Mode

Pin 46 (ID1)

Pin 45 (ID0)

Reg 28h ID1

Reg 28h ID0

PCM Left DAC

uses data from

slot #

PCM Right DAC

uses data from

slot #

Primary

NC/DV

DD

NC/DV

DD

003

4

Secondary 1

NC/DV

DD

GND

0

1

3

4

Secondary 2

GND

NC/DV

DD

107

8

Secondary 3

GND

GND

1

1

6

9

CHAIN_IN

Using National Semiconductor’s unique feature for chaining together codecs, a multiple codec system can be built. This chain

feature requires only a single stream back to the controller. By setting the two LSBs of register 74h to something other than the

codec ID, the codec stops sending its own SDATA_IN signal and instead passes the signal connected here out the SDATA_IN

pin. When the CHAIN_IN feature is used, another codec’s SDATA_IN pin should be connected here, or else this pin should be

grounded to prevent the possibility of floating the SDATA_IN signal at the controller. Reg 74h is updated at the rising edge of

SYNC.

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