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SST25PF080B датащи(PDF) 14 Page - Microchip Technology |
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SST25PF080B датащи(HTML) 14 Page - Microchip Technology |
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14 / 32 page ![]() SST25PF080B DS20005137B-page 14 2014 Microchip Technology Inc. 4.8 Program Security ID The Program SID instruction programs a byte of data in the user-programmable, Security ID space. Security ID addresses 08h-1FH are the user-programmable loca- tions. The device ignores a Program Security ID instruction pointing to an invalid or protected address, see Table 4-5. Prior to the program operation, execute WREN. To execute a Program SID operation, the host drives CE# low, sends the Program SID command cycle (A5H), one address cycle, the data to be programmed, then drives CE# high. Each cycle is eight clocks long, most significant bit first. To determine the completion of the internal, self-timed Program SID operation, poll the BUSY bit in the software status register, or wait TPSID for the completion of the internal self-timed Program SID operation. 4.8.1 READ-STATUS-REGISTER (RDSR) The Read-Status-Register (RDSR) instruction allows reading of the status register. The status register may be read at any time even during a Write (Program/ Erase) operation. When a Write operation is in prog- ress, the Busy bit may be checked before sending any new commands to assure that the new commands are properly received by the device. CE# must be driven low before the RDSR instruction is entered and remain low until the status data is read. Read-Status-Register is continuous with ongoing clock cycles until it is termi- nated by a low to high transition of the CE#. See Figure 4-14 for the RDSR instruction sequence. FIGURE 4-14: READ-STATUS-REGISTER (RDSR) SEQUENCE TABLE 4-5: PROGRAM SECURITY ID Program Security ID Address Range Pre-Programmed at factory 00H – 07H User Programmable 08H – 1FH 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 25137 RDSRseq.0 MODE 3 SCK SI SO CE# Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 05 MODE 0 HIGH IMPEDANCE Status Register Out MSB MSB |
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