SST25PF080B datasheet(3/32 Pages) MICROCHIP

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 2014 Microchip Technology Inc.

DS20005137B-page 3

SST25PF080B

2.0

PIN DESCRIPTION

FIGURE 2-1:

PIN ASSIGNMENTS

TABLE 2-1:

PIN DESCRIPTION

Symbol

Pin Name

Functions

SCK

Serial Clock

To provide the timing of the serial interface.

Commands, addresses, or input data are latched on the rising edge of the clock

input, while output data is shifted out on the falling edge of the clock input.

Serial Data Input

To transfer commands, addresses, or data serially into the device.

Inputs are latched on the rising edge of the serial clock.

Serial Data Output To transfer data serially out of the device.

Data is shifted out on the falling edge of the serial clock.

Outputs Flash busy status during AAI Programming when reconfigured as RY/BY#

pin. See “Hardware End-of-Write Detection” on page 9 for details.

CE#

Chip Enable

The device is enabled by a high to low transition on CE#. CE# must remain low for

the duration of any command sequence.

WP#

Write Protect

The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.

HOLD#

Hold

To temporarily stop serial communication with SPI flash memory without resetting

the device.

VDD

Power Supply

To provide power supply voltage: 2.3-3.6V for SST25PF080B

VSS

Ground

CE#

WP#

VSS

VDD

HOLD#

SCK

Top View

25137 08-soic S2A P1.0

CE#

WP#

VSS

Top View

VDD

HOLD#

SCK

25137 08-wson A P2.0

8-lead SOIC

8-contact WSON

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