PL613-01 datasheet(8/20 Pages) MICROCHIP

8 / 20 page

PL613-01

DS20005650A-page 8

 2016 Microchip Technology Inc.

3.5

PDB (Power Down Control)

When activated, PDB disables all the PLLs, the

oscillator circuitry, counters, and all other active

circuitry. PDB activation disables all outputs and the IC

consumes <10 µA of power. The PDB input

incorporates a 10 MΩ pull-up resistor for normal

operation.

The PDB feature can be programmed to allow the

output to float (HiZ) or to operate in active-low mode.

The logic for PDB is shown in the following table:

Typical enable time from power down in <2 ms.

3.6

CSEL (On-the-Fly Configuration

Switching)

The PL613-01 can be programmed to allow switching

between four different configurations, allowing for

changes in the output frequencies. Many applications

(i.e. video/audio) can use the same design footprint,

but allow for configuration switching, adhering to

various standards. CSEL0 and CSEL1 are used in the

switching selection. These pins incorporate a 60 kΩ

pull-up resistor for normal operation. The logic for

configuration switching of the programmed parts is

shown below:

Typical enable time is <500 µs.

3.7

FSELX (On-the-Fly Output

Frequency Switching Between

Two Output Frequencies)

The PL613-01 is equipped with the FSELX feature to

allow frequency switching between two frequencies on

one of the output pins. Frequencies assigned to CLK1

and CLK2 can be switched when FSELX is activated

on CLK2 output. The logic for FSELX is shown below:

Typical enable time is <10 ns plus one clock period.

PDB

PDB Type

(Programmable)

Osc

PLL Output

0 (default)

Off

HiZ

1Off

Off

Active

Normal Operation (default)

CSEL1

CSEL0

Programmed Configuration

3 (default)

FSELX

CLK2 Output

Frequency 2

1 (default)

Frequency 1

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