Silicon limitations

STM8AL3xxx STM8L052R8 STM8L1xxx6/8

12/18

DocID17922 Rev 6

1.3

Peripheral limitations

1.3.1

SPI2 peripheral limitations

SPI2_MOSI cannot be configured as pseudo open-drain on 48-pin packages

Description

On UFQFPN48 and LQFP48 packages, when the SPI2 peripheral is enabled and

SPI2_MOSI/PD5 is configured as pseudo open-drain output in the GPIO Port D control

register 1 (PD_CR1), PD5 remains in push-pull mode.

SPI2_MOSI can be configured as pseudo open-drain output on LQFP80 and LQFP64

packages.

Workaround

None. However, as SPI2_MOSI is usually configured as push-pull output, this limitation

should not have any impact.

No fix planned for this limitation.

1.3.2

I2C peripheral limitations

I2C event management

Description

As described in the I2C section of the STM8L05x/15x microcontroller family reference

manual (RM0031), the application firmware has to manage several software events before

the current byte is transferred. If the EV7, EV7_1, EV6_1, EV6_3, EV2, EV8 and EV3

events are not managed before the current byte is transferred, problems may occur such as

receiving an extra byte, reading the same data twice or missing data.

Workarounds

When the EV7, EV7_1, EV6_1, EV6_3, EV2, EV8, and EV3 events cannot be managed

before the current byte transfer and before the acknowledge pulse when the ACK control bit

changes, it is recommended to:

1.

2.

application to make them uninterruptible.

No fix planned for this limitation.