MIC24045 datasheet(16/46 Pages) MICROCHIP

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MIC24045

DS20005568A-page 16

 2016 Microchip Technology Inc.

3.0

PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

3.1

Input Voltage Pin (VIN)

Input Voltage pin for the Buck converter power stage.

These pins are the drain terminal of the internal

high-side N-channel MOSFET. A 10 µF minimum

ceramic capacitor should be connected from VIN to the

PGND pins as close as possible to the device. A combi-

nation of multiple ceramic capacitors of different sizes

is recommended.

3.2

Power Ground Pin (PGND)

Low-side MOSFET source terminal and low-side driver

return. Connect the ceramic input capacitors to PGND

as close as possible to the device.

3.3

Switch Node Pin (LX)

Drain (low-side MOSFET) and source (high-side

MOSFET) connection of the internal power N-channel

FETs. The external inductor (switched side) and

bootstrap capacitor (bottom terminal) must be

connected to these pins.

3.4

Bootstrap Capacitor Pin (BST)

Supply voltage for the driver of the high-side N-channel

power MOSFET. Connect the bootstrap capacitor (top

terminal) to this pin.

3.5

Power Good Output Pin (PG)

When the output voltage is within 92.5% of the nominal

set point, this pin will go from logic low to logic high

through an external pull-up resistor. This pin is the drain

connection of an internal N-channel FET.

3.6

I2C Address Programming Pin 0

(ADR0)

Three-state pin (low, high and high-Z) for I2C address

programming. Together with ADR1, ADR0 defines nine

logic values corresponding to nine I2C addresses.

3.7

I2C Address Programming Pin 1

(ADR1)

Three-state pin (low, high and high-Z) for I2C address

programming. Together with ADR0, ADR1 defines nine

logic values corresponding to nine I2C addresses.

TABLE 3-1:

PIN FUNCTION TABLE

MIC24045

Symbol

Pin Function

1, 2

VIN

Input Voltage Pin

3, 4, 13

PGND

Power Ground Pin

5, 6

Switch Node Pin

BST

Bootstrap Capacitor Pin. A bootstrap capacitor is connected

between the BST and LX pins.

Power Good Open-Drain Output Pin

ADR0

I2C Address Programming Pin 0

ADR1

I2C Address Programming Pin 1

SCL

I2C Clock Input Pin

SDA

I2C Data Input/Output Pin

AGND

Analog Ground Pin

COMP

Transconductance Error Amplifier Output Pin. Connect the com-

pensation network from COMP to AGND.

OUTSNS

Output Sensing Pin

Precision Enable Input Pin

VDDA

Internal Regulator Output Pin

VDDP

MOSFET Drivers Internal Supply Pin

VINLDO

Internal Regulator Input Pin

VIN_EP

VIN Exposed Pad. Electrically connected to VIN.

PGND_EP

PGND Exposed Pad. Electrically connected to PGND.

LX_EP

LX Exposed Pad. Electrically connected to LX.

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