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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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COM20022I датащи(PDF) 74 Page - SMSC Corporation |
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COM20022I датащи(HTML) 74 Page - SMSC Corporation |
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74 / 83 page  10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM Datasheet Rev. 08-18-03 Page 74 SMSC COM20022I DATASHEET t1 t3 Parameter Input Clock High Time Input Clock Period* min 20 50 max units nS nS XTAL1 t1 t4 Input Clock Frequency* 100 t2 Input Clock Low Time nS t3 20 typ 10 t2 20 MHz t5 Frequency Accuracy* -200 200 ppm Note*: Input clock frequency must be 20 MHz ( 100ppm or better) to use the internal Clock Multiplier. +- t4 and t5 are applied to crystal oscillaton. 4.0V 1.0V 50% of VDD Figure 8.15 - TTL Input Timing on XTAL1 Pin t1 Parameter nRESET Pulse Width*** min max units nRESET t1 t2 nINTR High to Next nINTR Low typ t2 nINTR 5TXTL* EF = 0 EF = 1 TDR**/2 4TXTL* Note*: TXTL is period of external XTAL oscillation frequency. Note**: TDR is period of Data Rate (i.e. at 2.5 Mbps, TDR = 400 nS) Note***: When the power is turned on, t1 is measured from stable XTAL oscillation after VDD was over 4.5V. Figure 8.16 - Reset and Interrupt Timing |
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