RN52 datasheet(9/26 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS70005120A-page 9

RN52

1.1.3

ANALOG-TO-DIGITAL CONVERTER

(ADC)

The ADC consists of two second-order sigma delta

(SD) converters, resulting in two separate channels

with identical functionality. Each ADC supports the

following sample rates:

•8 kHz

•16 kHz

•32 kHz

• 44.1 kHz

•48 kHz

The ADC analog amplifier is a two-stage amplifier. The

first stage selects the correct gain for either micro-

phone or line input. See Figure 1-7.

FIGURE 1-7:

ADC ANALOG AMPLIFIER BLOCK DIAGRAM

1.1.4

DIGITAL-TO-ANALOG CONVERTER

(DAC)

The DAC consists of two third-order SD converters,

resulting in two separate channels with identical func-

tionality. Each DAC supports the following sample

rates:

•8 kHz

•16 kHz

•32 kHz

• 44.1 kHz

•48 kHz

1.1.4.1

Speaker Output

The speaker output is capable of driving a speaker with

an impedance of at least 8 ohms directly. The overall

gain of the speaker output is approximately -21 dB to

0 dB in 1.5 dB steps.

1.1.4.2

Microphone Input

The RN52 audio input is intended for use from 1 μA at

94 dB SPL to about 10 μA at 94 dB SPL, which requires

microphones with sensitivity between –40 and –60

dBV. The RN52 microphone mode input impedance is

typically 6 kohm. The line mode input impedance is typ-

ically between 6 kohm and 30 kohm. The overall gain

of the microphone input is approximately -3 dB to 42 dB

in 1.5 dB steps. MIC_BIAS requires a minimum load to

maintain regulation. MIC_BIAS maintains regulation

within 0.199 and 1.229 mA. Therefore, if you use a

microphone with specifications below these limits, the

microphone output must be pre-loaded with a large

value resistor to ground.

–

Gain 0:7

Line Mode/Microphone Mode

Bypass or 24-dB Gain

-3 to 18 dB Gain

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