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TLV2760IDBVR датащи(PDF) 15 Page - Texas Instruments |
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TLV2760IDBVR датащи(HTML) 15 Page - Texas Instruments |
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15 / 27 page ![]() TLV2760, TLV2761, TLV2762, TLV2763, TLV2764, TLV2765 FAMILY OF 1.8 V MICROPOWER RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH SHUT DOWN SLOS326D – JUNE 2000 – REVISED FEBRUARY 2001 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION general configurations (continued) VI VO C1 + – RG RF R1 f –3dB + 1 2 pR1C1 V O V I + 1 ) R F R G 1 1 ) sR1C1 VDD/2 Figure 33. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. VI C2 R2 R1 C1 RF RG R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) ( = 1 Q 2 – ) RG RF _ + f –3dB + 1 2 pRC VDD/2 Figure 34. 2-Pole Low-Pass Sallen-Key Filter circuit layout considerations To achieve the levels of high performance of the TLV276x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D Ground planes—It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1- µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1- µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. |
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