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ST92196A датащи(PDF) 175 Page - STMicroelectronics |
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ST92196A датащи(HTML) 175 Page - STMicroelectronics |
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175 / 268 page ![]() 175/268 - FOUR-CHANNEL I2C BUS INTERFACE (I2C) I2C BUS INTERFACE (Cont’d) 8.9.6 Register Description OWN ADDRESS REGISTER (I2COAR) R240 - Read/Write Register Page: 44 Reset Value: 0000 0000(00h) Bit 7:1 = ADR[7:1] Interface Slave Address These bits are the 7 most significant bits of the 8- bit address assigned to interface when it works in slave mode. Bit 0 = ADR0 Address match bit This bit selects when the I2C interface becomes active if it works in slave mode, and if its slave ad- dress is transmitted on the bus. 0: The interface becomes an active slave when the 7 most significant bits ADR[7:1] match the ad- dress transmitted by a master. 1: The interface becomes an active slave when only the 4 most significant bits ADR[7:4] match the address transmitted by a master. This fea- ture allows the master to send data simultane- ously to up to 8 slaves with identical ADR(7:4). 70 ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 |
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