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TUSB7320 датащи(PDF) 35 Page - Texas Instruments

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номер детали TUSB7320
подробное описание детали  USB 3.0 xHCI Host Controller
PDF  117 Pages
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домашняя страница  http://www.ti.com
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TUSB7320 датащи(HTML) 35 Page - Texas Instruments

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TUSB7320, TUSB7340
www.ti.com
SLLSE76M – MARCH 2011 – REVISED JULY 2015
7.5.1.31 MSI Lower Message Address Register
This register contains the lower 32 bits of the address that a MSI message is written to when an interrupt is to be
signaled.
PCI register offset: 4Ch
Register type: Read/Write
Default value: 0000 0000h
Table 45. PCI Register 4Ch
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
No.
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
State
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
No.
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
State
Table 46. MSI Lower Message Address Register Description
BIT
FIELD NAME
ACCESS
DESCRIPTION
31:2
ADDRESS
rw
System Specified Message Address
1:0
RSVD
r
Reserved. Return zeros when read.
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