ASX340CS datasheet(30/74 Pages) ONSEMI

30 / 74 page

ASX340CS_DS Rev. F Pub. 6/15 EN

©Semiconductor Components Industries, LLC, 2015.

ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor

External Signal Processing

Host Command Interface

ON Semiconductor’s sensors and SOCs contain numerous registers that are accessed

through a two-wire interface with speeds up to 400 kHz.

The ASX340CS in addition to writing or reading straight to/from registers or firmware

variables, has a mechanism to write higher level commands, the Host Command Inter-

face (HCI). Once a command has been written through the HCI, it will be executed by on

chip firmware and the results are reported back. In general, registers shall not be

accessed with the exception of registers that are marked for “User Access.”

EEPROM or Flash memory is also available to store commands for later execution.

Under DMA control, a command is written into the SOC and executed.

For a complete spec on host commands, refer to the ASX340CS Host Command Interface

Specification.

Figure 15:

Interface Structure

Host Command to FW

Response from FW

bit

command register

Addr 0x40

Addr 0xFC00

Addr 0xFC0E

Addr 0xFC02

Addr 0xFC04

Addr 0xFC06

Addr 0xFC08

Addr 0xFC0A

Addr 0xFC0C

door bell

bit

Parameter 0

Parameter 7

cmd_handler_params_pool_0

cmd_handler_params_pool_1

cmd_handler_params_pool_2

cmd_handler_params_pool_3

cmd_handler_params_pool_4

cmd_handler_params_pool_5

cmd_handler_params_pool_6

cmd_handler_params_pool_7

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