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ASX340CS датащи(PDF) 28 Page - ON Semiconductor |
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ASX340CS датащи(HTML) 28 Page - ON Semiconductor |
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28 / 74 page ![]() ASX340CS_DS Rev. F Pub. 6/15 EN 28 ©Semiconductor Components Industries, LLC, 2015. ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor External Signal Processing Power Sequence In power-up, the core voltage (1.8V) must trail the IO (2.8V) by a positive number. All 2.8V rails can be turned on at the same time or follow the power-up sequence in Figure 39: “Power Up Sequence,” on page 51. In power down, the sequence is reversed. The core voltage (1.8V) must be turned off before any 2.8V. Refer to Figure 40: “Power Down Sequence,” on page 52 for details. Figure 14: Power-Up Sequence – Configuration Options Flow Chart DOUT_LSB 0 Power Up/ RESET Auto Configuration: FRAME_VALID LINE_VALID SPI _SDI = 0? Wait for Host Command Wait for Host Command Parse EEPROM/Flash Content Wait for Host Command yes no Disable Auto-Config Host Config DOUT_LSB 1 EEPROM/Flash contents valid? EEPROM/Flash device present? no Change Config (default) :(optional) Auto-Config Change-Config Auto-Config Change-Config no yes |
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