AP0101CS datasheet(7/42 Pages) ONSEMI

7 / 42 page

AP0101CS/D Rev. 7, 1/16 EN

©Semiconductor Components Industries, LLC,2016.

AP0101CS HDR: Image Signal Processor (ISP)

System Interfaces

Crystal Usage

As an alternative to using an external oscillator, a crystal may be connected between

EXTCLK and XTAL. Two small loading capacitors and a feedback resistor should be

added, as shown in Figure 3.

Figure 3:

Using a Crystal Instead of an External Oscillator

Rf represents the feedback resistor, an Rf value of 1M would be sufficient for AP0101CS.

C1 and C2 are decided according to the crystal or resonator CL specification. In the

steady state of oscillation, CL is defined as (C1 x C2)/(C1+C2). In fact, the I/O ports, the

bond pad, package pin and PCB traces all contribute the parasitic capacitance to C1 and

C2. Therefore, CL can be rewritten to be (C1* x C2*)/(C1*+C2*), where C1*=(C1+Cin,

stray) and C2*=(C2+Cout, stray). The stray capacitance for the IO ports, bond pad and

package pin are known which means the formulas can be rewritten as

C1*=(C1+1.5pF+Cin, PCB) and C2*=(C2+1.3pF+Cout, PCB).

Table 4:

Pin Descriptions

Name

Type

Description

EXTCLK

Input

Master input clock. This can either be a square-wave generated from an oscillator (in

which case the XTAL input must be left unconnected) or direct connection to a crystal.

XTAL

Output

If EXTCLK is connected to one pin of a crystal, the other pin of the crystal is connected to

XTAL pin; otherwise this signal must be left unconnected.

RESET_BAR

Input/PU

Master reset signal, active LOW. This signal has an internal pull up.

SCLK

Input

Two-wire serial interface clock (host interface).

SDATA

I/O

Two-wire serial interface data (host interface).

SADDR

Input

Selects device address for the two-wire slave serial interface. When connected to GND

the device ID is 0x90. When wired to VDDIO_H, a device ID of 0xBA is selected.

FRAME_SYNC

Input

This input can be used to set the output timing of the AP0101CS. This signal should be

connected to GND if not used.

STANDBY

Input

Standby mode control, active HIGH.

SPI_SCLK

Output

Clock output for interfacing to an external SPI flash or EEPROM memory.

EXTCLK

XTAL

AP0101

Rf=1M

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