CS5376A datasheet(43/107 Pages) CIRRUS

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CS5376A

12. SINC FILTER

The SINC filters primary purpose is to attenuate

out-of-band noise components from the

∆Σ modu-

lators. While doing so, they decimate 1-bit

∆Σ data

into lower frequency 24-bit data suitable for the

FIR and IIR filters.

The SINC filter has three cascaded sections,

SINC1, SINC2, and SINC3, which are each made

up of the smaller stages shown in Figure 23.

The selected output word rate in the FILTCFG reg-

ister automatically determines the coefficients and

decimation ratios selected for the SINC filters.

Once the SINC filter configuration is set, all en-

abled channels are filtered and decimated using an

identical hardware algorithm.

12.1 SINC1 Filter

The first section is SINC1, a single stage 5th order

fixed decimate by 8 SINC filter. This SINC filter

decimates the incoming 1-bit

∆Σ bit stream from

the modulators down to a 64 kHz rate.

12.2 SINC2 Filter

The second section is SINC2, a multi-stage, vari-

able order, variable decimation SINC filter. De-

pending on the selected output word rate in the

FILTCFG register, different cascaded SINC2 stag-

es are enabled, as shown in Table 9.

12.3 SINC3 Filter

The last section is SINC3, a flexible multi-stage

variable order, variable decimation SINC filter.

Depending on the selected output word rate in the

FILTCFG register, different SINC3 stages are en-

abled, as shown in Table 9.

12.4 SINC Filter Synchronization

The SINC filter is synchronized to the external sys-

tem by the MSYNC signal, which is generated

from the SYNC input. The MSYNC signal sets a

reference time (time 0) for all filter operations, and

the SINC filter is restarted to phase align with this

reference time.

sinc1

5th order

4th order

Figure 23. SINC Filter Block Diagram

1-bit

24-bit

∆−Σ

stage1

sinc2

4th order

stage2

sinc2

4th order

stage3

sinc2

4th order

stage4

sinc2

4th order

stage1

sinc3

4th order

stage2

sinc3

4th order

stage3

sinc3

5th order

stage4

sinc3

6th order

stage5

sinc3

6th order

stage6

sinc3

Output

Input

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