ST16C580

9

Rev. 1.20

DECODE

A2

A1

A0

READ MODE

WRITE MODE

General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR):

0

0

0

Receive Holding Register

Transmit Holding Register

0

0

1

Interrupt Enable Register

0

1

0

Interrupt Status Register

FIFO Control Register

0

1

1

Line Control Register

1

0

0

Modem Control Register

1

0

1

Line Status Register

1

1

0

Modem Status Register

1

1

1

Scratchpad Register

Scratchpad Register

Baud Rate Register Set (DLL/DLM): Note *3

0

0

0

LSB of Divisor Latch

LSB of Divisor Latch

0

0

1

MSB of Divisor Latch

MSB of Divisor Latch

Enhanced Register Set (EFR, Xon/off 1-2): Note *4

0

1

0

Enhanced Feature Register

Enhanced Feature Register

1

0

0

Xon-1 Word

Xon-1 Word

1

0

1

Xon-2 Word

Xon-2 Word

1

1

0

Xoff-1 Word

Xoff-1 Word

1

1

1

Xoff-2 Word

Xoff-2 Word

Note *3: These registers are accessible only when LCR bit-7 is set to a logic 1.

Note *4: Enhanced Feature Register, Xon 1,2 and Xoff 1,2 are accessible only when the LCR is set to “BF” (HEX).