ST16C580CP40 datasheet(4/41 Pages) EXAR

4 / 41 page

ST16C580

Rev. 1.20

SYMBOL DESCRIPTION

Address-0 Select Bit - Internal registers address selection.

Address-1 Select Bit Internal registers address selection.

Address-2 Select Bit Internal registers address selection.

IOR

Read strobe. Its function is the same as -IOR (see -IOR),

except it is active high. Either an active -IOR or IOR is

required to transfer data from 580 to CPU during a read

operation.

CS0

Chip Select-0. A logical 1 on this pin provides the chip select

0 function.

CS1

Chip Select-1. A logical 1 on this pin provides the chip select

1 function.

-CS2

Chip Select -2. A logical 0 on this pin provides the chip select

2 function.

IOW

Write strobe. A logic 1 transition creates a write strobe. Its

function is the same as -IOW (see -IOW), but it acts as an

active high input signal. Either -IOW or IOW is required to

transfer data from the CPU to 580 during a write operation.

-AS

Address Strobe. A logic 0 transition on -AS latches the state

of the chip selects and the register select bits, A0-A2. This

input is used when address and chip selects are not stable

for the duration of a read or write operation, i.e., a micropro-

cessor that needs to de-multiplex the address and data bits.

If not required, the -AS input can be permanently tied to a

logic 0 (it is edge triggered).

D0-D7

1-8

2-9

43-47

2-4

I/O

Data Bus (Bi-directional) - These pins are the eight bit, three

state data bus for transferring information to or from the

controlling CPU. D0 is the least significant bit and the first

data bit in a transmit or receive serial data stream.

GND

Pwr

Signal and Power Ground.

Symbol

Signal

Pin Description

type

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