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GXM датащи(PDF) 238 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 238 Page - National Semiconductor (TI) |
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238 / 244 page ![]() www.national.com 238 Revision 3.1 Index (Continued) Directory Table Entry 73 Display Controller 129 –154 Buffer Organization 135 CODEC hardware 129 Compression Logic 130 Compression Technology 130 CRT Display Modes 134 Cursor Pattern Memory 136 DC Memory Organization 135 DC_CURSOR_COLOR Register (BX_BASE+8360h) 131 Display FIFO 130 Display Modes 131 Display Timing 131 Dither/Frame-Rate Modulation (FRM) 131 Graphics Memory Map 135 Hardware Cursor 131 Memory Management 130 Pixel Arrangement Within a DWORD 135 RAMDAC 129 TFT LCD flat panel 129 TFT Panel Data Bus Formats 133 TFT Panel Display Modes 132 VESA-compatible 131 VGA Display Support 136 Display Controller Block Diagram 129 Display Controller Registers 136 Configuration and Status Registers 139 DC_BORDER_COLOR (8368h-836Bh) 138 DC_BUF_SIZE (8328h-832Bh) 137 DC_CB_ST_OFFSET (8314h-8317h) 137 DC_CFIFO_DIAG (837Ch-837Fh) 138 DC_CURS_ST_OFFSET (8318h-831Bh) 137 DC_CURSOR_COLOR (83680h-8363h) 138 DC_CURSOR_X (8350h-8353h) 137 DC_CURSOR_Y (8358h-835Bh) 137 DC_DFIFO_DIAG (8378h-837Bh) 138 DC_FB_ST_OFFSET (8310h-8313h) 136 DC_FP_H_TIMING (833Ch-833Fh) 137 DC_FP_V_TIMING (834Ch-834Fh) 137 DC_GENERAL_CFG (8304h-8307h) 136 DC_H_TIMING_1 (8330h-8333h) 137 DC_H_TIMING_2 (8334h-8337h) 137 DC_H_TIMING_3 (8338h-833Bh) 137 DC_LINE_DELTA (8324h-8327h) 137 DC_OUTPUT_CFG (830Ch-830Fh) 136 DC_PAL_ADDRESS (8370h-8373h) 138 DC_PAL_DATA (8374h-8377h) 138 DC_SS_LINE_CMP (835Ch-835Fh) 137 DC_TIMING_CFG (8308h-830Bh) 136 DC_UNLOCK (8300h-8303h) 136 DC_V_LINE_CNT (8354h-8357h) 137 DC_V_TIMING_1 (8340h-8343h) 137 DC_V_TIMING_2 (8344h-8247h) 137 DC_V_TIMING_3 (8348h-834Bh) 137 DC_VID_ST_OFFSET (8320h-8323h) 137 Memory Organization Registers 144 Display Driver BB0_RESET 98 BB1_RESET 98 CPU_READ 98 CPU_WRITE 98 Scratchpad 98 Display Driver Instructions 98 DR6 Register 53 Bn 53 BS 53 BT 53 DR7 and DR6 Bit Definitions 53 DR7 Register 53 GD 53 Gn 53 LENn 53 Ln 53 R/Wn 53 DRAM Address Conversion 112 E EBP register 40 EFLAGS Register 43 Alignment Check Enable (AM) 43 Auxiliary Carry Flag 43 Carry Flag 43 CPUID instruction 43 Direction Flag (DF) 43 I/O Privilege Level (IOPL) 43 Identification Bit 43 Interrupt Enable 43 Nested Task (NT) 43 Resume Flag (RF) 43 Sign Flag 43 Trap Enable Flag 43 Virtual 8086 Mode (VM) 43 EFLAGS register, bit 9 83 EGA 165 Electrical Connections 182 NC-Designated Pins 182 Power/Ground Connections 182 Pull-Up/Pull-Down Resisters 182 Unused Input Pins 182 Electrical Specifications 182 Absolute Maximum Ratings 183 AC Characteristics 186 Clock Signals 187 DC Characteristics Table 185 DCLK Timing 192 Graphics Port Timing 191 JTAG AC Specification 193 JTAG Test Timings 194 Output Valid Timing 190 Part Numbers 182 PCI Interface Signals 189 SDRAM Interface Signals 190 Setup and Hold Timings 190 SYSCLK Timing 187 System Signals 188 TCK Timing and Measurement Points 193 Video Interface Signals 191 Video Port Timing 192 Exceptions 74 Abort 75 Fault 75 Trap 74 Extended MMX Instruction Set 234 Extended MMX™ Instruction Set Configuration Control Rregister 234 Legend 234 F Fields - index 207 Fields - mod and r/m 205 Fields - sreg3 206 Fields - ss 207 floating point error 25 |
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