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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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GXM датащи(PDF) 241 Page - National Semiconductor (TI) |
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GXM датащи(HTML) 241 Page - National Semiconductor (TI) |
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241 / 244 page  Revision 3.1 241 www.national.com Index (Continued) PCI Command (04h-05h) 157 PCI Control Function 1 (40h) 157 PCI Control Function 2 (41h) 157 Register 156 Revision Identification (08h) 157 Translation Type Bits 1 0 156 Vendor Identification (00h-01h) 157 PCI Configuration Registers 0CF8h-0CFBh 156 PCI Controller 155 CONFIG_ADDRESS 155 Configuration Cycles 155 PCI Arbiter 155 Space Control Registers 156 Special Cycles 155 X-Bus PCI Master 155 X-Bus PCI Slave 155 PCI Cycles 162 PCI Halt Command 164 PCI Interface Signals Frame 27 Initiator Ready 27 Lock Operation 28 Multiplexed Address and Data 26 Multiplexed Command and Byte Enables 26 Parity 26 Parity Error 28 Request Lines 28 Target Ready 27 Target Stop 27 PCI Local Bus Specification 162 PCI Read Transactions 162 PCI Special Cycle Command 164 PCI Write Transactions 163 PCR Performance Control Register Index 20h 50 PERR 28 Pixel Arrangement Within a DWORD 135 Pointer and Index Registers ECX Counter 40 EDI Destination Pointer 40 ESI Source Pointer 40 ESP Register 40 PUSH and POP Instructions 40 Power and Ground Connections and Decoupling 182 Power Management 174 3-Volt Suspend Mode 174 Advanced Power Management (APM) 174 CPU Suspend Command Registers 174 Initiating Suspend with HALT 176 Initiating Suspend with SUSP 175 Processor Serial Bus 179 Responding to a PCI Access During Suspend Mode 177 Serial Packet Transmission 179 Stopping the Input Clock 178 Suspend Mode and Bus Cycles 175 Suspend Modulation 174 Power Management Registers 179 PM_BASE (FFFF FF6Ch) 179 PM_CNTRL_CSTP (8508h-850Bh) 179 PM_CNTRL_TEN (8504h-8507h) 179 PM_MASK (FFFF FF7Ch) 179 PM_SER_PACK (850Ch-850Fh) 179 PM_STAT_SMI (8500h-8503h) 179 Power Planes 36 –37 Power, Ground, No Connect Ground (VSS) 32 Power, Ground, No Connect Signals Ground (VSS) 32 No Connect (NC) 32 Power Connect (VCC2) 32 Power Connect (VCC3) 32 Voltage Detect(VOLDET) 32 Privilege Level Transfers 87 Privilege Levels (CPL, DPL and RPL) 86 Privilege Levels (I/O) 86 Processor Core Instruction Set 212 Clock Counts 212 Flags 212 Legend 212 Opcodes 212 Processor Initialization 38 Programming Interface 38 Protected Mode, Initialization and Transition 87 Protection 86 Current Privilege Level (CPL) 86 Descriptor Privilege Level (DPL) 86 Requested Privilege Level (RPL) 86 Protection - V86 Mode 88 R Register Controls 38 Register Sets 40 Application Flags Register 40 General Purpose Register 40 Instruction Pointer Register 40 Segment Registers 40 Flags Register 43 General Purpose 40 Data Registers 40 Pointer and Index Registers 40 Instruction Pointer 42 Selection Rules 42 Model Specific Register 40 System Register Set 40 , 44 Registers Application Register 40 Model Specific Register 59 REQ 28 RESET 38 ROP (raster operation) 166 Row Address Strobe CAS 29 CKE 29 RAS 29 RASA 29 RASB 29 WE 29 S Scratchpad 2KB configurations 97 3KB configurations 97 SMM information 97 Scratchpad RAM 97 SDRAM Clocks SDCLK_IN 30 SDCLK_OUT 30 Segment Register Selection Rules 42 Segment Registers 42 Serial Packet CX5520 25 |
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