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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCM1602 датащи(PDF) 23 Page - Texas Instruments |
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PCM1602 датащи(HTML) 23 Page - Texas Instruments |
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23 / 29 page  PCM1602 23 SBAS163 ZERO FLAG Zero Detect Condition Zero Detection for each output channel is independent from the others. If the data for a given channel remains at a “0” level for 1024 sample periods (or LRCK clock periods), a Zero Detect condition exists for that channel. Zero Output Flags Given that a Zero Detect condition exists for one or more channels, the Zero Flag pins for those channels will be set to a logic “1” state. There are Zero Flag pins for each channel, ZERO1 through ZERO6 (pins 1 through 6). In addition, all six Zero Flags are logically “AND”ed together, and the result provided at the ZEROA pin (pin 48), which is set to a logic “1” state when all channels indicate a Zero Detect condition. The Zero Flag pins can be used to operate external mute circuits, or used as status indicators for a microcontroller, audio signal processor, or other digitally controlled functions. The active polarity of zero flag output can be inverted by setting the ZREV bit of Control Register 10 to “1”. The reset default is active high output, or ZREV = 0. APPLICATIONS INFORMATION CONNECTION DIAGRAMS A basic connection diagram with the necessary power-supply bypassing and decoupling components is shown in Figure 12. Texas Instruments recommends using the component values shown in Figure 12 for all designs. FIGURE 12. Basic Connection Diagram. 24 23 22 21 20 19 18 17 16 15 14 13 37 38 39 40 41 42 43 44 45 46 47 48 RST SCKI SCKO BCK LRCK TEST V DD DGND DATA1 DATA2 DATA3 AGND3 V CC4 AGND4 NC AGND6 V CC5 AGND5 NC V COM V OUT1 36 35 34 33 32 31 30 29 28 27 26 123456789 10 11 25 12 PCM1602 Micro Controller +5V Power Supply 10 µF 10 µF 10 µF ZERO1–6 Regulator LPF LPF LPF LPF LPF LPF V CC3 V OUT2 V OUT1 V OUT2 V OUT3 V OUT4 V OUT5 V OUT6 ZEROA ZEROA PLL1700 ML MC MD SCKO3 RST LRCK DATA1 DATA2 DATA3 BCK |
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