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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320VC5510 датащи(PDF) 71 Page - Texas Instruments |
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TMS320VC5510 датащи(HTML) 71 Page - Texas Instruments |
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71 / 86 page  Electrical Specifications 71 June 2000 − Revised July 2004 SPRS076J 5.15 Multichannel Buffered Serial Port (McBSP) Timings 5.15.1 McBSP Transmit and Receive Timings Table 5−23 and Table 5−24 assume testing over recommended operating conditions (see Figure 5−21 and Figure 5−22). Table 5−23. McBSP Timing Requirements†‡ NO. VC5510-160 VC5510-200 UNIT NO. MIN MAX UNIT M11 tc(CKRX) Cycle time, CLKR/X CLKR/X ext 2P ns M12 tw(CKRX) Pulse duration, CLKR/X high or CLKR/X low CLKR/X ext P−1 ns M13 tr(CKRX) Rise time, CLKR/X CLKR/X ext 5 ns M14 tf(CKRX) Fall time, CLKR/X CLKR/X ext 5 ns M15 tsu(FRH-CKRL) Setup time, external FSR high before CLKR low CLKR int 5 ns M15 tsu(FRH-CKRL) Setup time, external FSR high before CLKR low CLKR ext 1 ns M16 th(CKRL-FRH) Hold time, external FSR high after CLKR low CLKR int 0 ns M16 th(CKRL-FRH) Hold time, external FSR high after CLKR low CLKR ext 2 ns M17 tsu(DRV-CKRL) Setup time, DR valid before CLKR low CLKR int 4 ns M17 tsu(DRV-CKRL) Setup time, DR valid before CLKR low CLKR ext 1 ns M18 th(CKRL-DRV) Hold time, DR valid after CLKR low CLKR int 0 ns M18 th(CKRL-DRV) Hold time, DR valid after CLKR low CLKR ext 2 ns M19 tsu(FXH-CKXL) Setup time, external FSX high before CLKX low CLKX int 5 ns M19 tsu(FXH-CKXL) Setup time, external FSX high before CLKX low CLKX ext 1 ns M20 th(CKXL-FXH) Hold time, external FSX high after CLKX low CLKX int 0 ns M20 th(CKXL-FXH) Hold time, external FSX high after CLKX low CLKX ext 2 ns † Polarity bits CLKRP = CLKXP = FSRP = FSXP = 0. If the polarity of any of the signals is inverted, then the timing references of that signal are also inverted. ‡ P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns. |
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